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Searched refs:s_brev_b32 (Results 1 – 23 of 23) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dbitreverse.ll17 ; SI: s_brev_b32
35 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
58 ; SI: s_brev_b32
59 ; SI: s_brev_b32
107 ; SI: s_brev_b32
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfcopysign.f16.ll17 ; SI: s_brev_b32 s[[CONST:[0-9]+]], -2
43 ; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
67 ; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
92 ; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
118 ; GCN-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
144 ; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
172 ; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
200 ; SI-DAG: s_brev_b32 s[[CONST:[0-9]+]], -2
Dbitreverse.ll18 ; SI: s_brev_b32
36 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
61 ; SI: s_brev_b32
62 ; SI: s_brev_b32
Dbitreverse-inline-immediates.ll182 ; GCN: s_brev_b32 s{{[0-9]+}}, 1{{$}}
189 ; GCN: s_brev_b32 s{{[0-9]+}}, 64{{$}}
203 ; GCN: s_brev_b32 s{{[0-9]+}}, -16{{$}}
Dfcopysign.f64.ll15 ; GCN-DAG: s_brev_b32 [[SCONST:s[0-9]+]], -2
30 ; GCN-DAG: s_brev_b32 [[SCONST:s[0-9]+]], -2{{$}}
Dfneg-fabs.ll86 ; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}}
97 ; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}}
Dfcopysign.f32.ll16 ; GCN-DAG: s_brev_b32 [[SCONST:s[0-9]+]], -2
Dllvm.round.f64.ll23 ; SI-DAG: s_brev_b32 [[BFIMASK:s[0-9]+]], -2{{$}}
Dllvm.round.ll8 ; GCN-DAG: s_brev_b32 [[K:s[0-9]+]], -2{{$}}
/external/llvm/test/MC/AMDGPU/
Dsop1.s83 s_brev_b32 s1, s2 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dsop1.s86 s_brev_b32 s1, s2 label
Dgfx7_asm_all.s11106 s_brev_b32 s5, s1 label
11109 s_brev_b32 s103, s1 label
11112 s_brev_b32 flat_scratch_lo, s1 label
11115 s_brev_b32 flat_scratch_hi, s1 label
11118 s_brev_b32 vcc_lo, s1 label
11121 s_brev_b32 vcc_hi, s1 label
11124 s_brev_b32 tba_lo, s1 label
11127 s_brev_b32 tba_hi, s1 label
11130 s_brev_b32 tma_lo, s1 label
11133 s_brev_b32 tma_hi, s1 label
[all …]
Dgfx8_asm_all.s11721 s_brev_b32 s5, s1 label
11724 s_brev_b32 s101, s1 label
11727 s_brev_b32 flat_scratch_lo, s1 label
11730 s_brev_b32 flat_scratch_hi, s1 label
11733 s_brev_b32 vcc_lo, s1 label
11736 s_brev_b32 vcc_hi, s1 label
11739 s_brev_b32 tba_lo, s1 label
11742 s_brev_b32 tba_hi, s1 label
11745 s_brev_b32 tma_lo, s1 label
11748 s_brev_b32 tma_hi, s1 label
[all …]
Dgfx9_asm_all.s11983 s_brev_b32 s5, s1 label
11986 s_brev_b32 s101, s1 label
11989 s_brev_b32 flat_scratch_lo, s1 label
11992 s_brev_b32 flat_scratch_hi, s1 label
11995 s_brev_b32 vcc_lo, s1 label
11998 s_brev_b32 vcc_hi, s1 label
12001 s_brev_b32 m0, s1 label
12004 s_brev_b32 exec_lo, s1 label
12007 s_brev_b32 exec_hi, s1 label
12010 s_brev_b32 s5, s101 label
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt54 # VI: s_brev_b32 s1, s2 ; encoding: [0x02,0x08,0x81,0xbe]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt63 # VI: s_brev_b32 s1, s2 ; encoding: [0x02,0x08,0x81,0xbe]
Dgfx8_dasm_all.txt8457 # CHECK: s_brev_b32 s5, s1 ; encoding: [0x01,0x08,0x85,0xbe]
8460 # CHECK: s_brev_b32 s101, s1 ; encoding: [0x01,0x08,0xe5,0xbe]
8463 # CHECK: s_brev_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x08,0xe6,0xbe]
8466 # CHECK: s_brev_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x08,0xe7,0xbe]
8469 # CHECK: s_brev_b32 vcc_lo, s1 ; encoding: [0x01,0x08,0xea,0xbe]
8472 # CHECK: s_brev_b32 vcc_hi, s1 ; encoding: [0x01,0x08,0xeb,0xbe]
8475 # CHECK: s_brev_b32 tba_lo, s1 ; encoding: [0x01,0x08,0xec,0xbe]
8478 # CHECK: s_brev_b32 tba_hi, s1 ; encoding: [0x01,0x08,0xed,0xbe]
8481 # CHECK: s_brev_b32 tma_lo, s1 ; encoding: [0x01,0x08,0xee,0xbe]
8484 # CHECK: s_brev_b32 tma_hi, s1 ; encoding: [0x01,0x08,0xef,0xbe]
[all …]
Dgfx9_dasm_all.txt9612 # CHECK: s_brev_b32 s5, s1 ; encoding: [0x01,0x08,0x85,0xbe]
9615 # CHECK: s_brev_b32 s101, s1 ; encoding: [0x01,0x08,0xe5,0xbe]
9618 # CHECK: s_brev_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x08,0xe6,0xbe]
9621 # CHECK: s_brev_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x08,0xe7,0xbe]
9624 # CHECK: s_brev_b32 vcc_lo, s1 ; encoding: [0x01,0x08,0xea,0xbe]
9627 # CHECK: s_brev_b32 vcc_hi, s1 ; encoding: [0x01,0x08,0xeb,0xbe]
9630 # CHECK: s_brev_b32 m0, s1 ; encoding: [0x01,0x08,0xfc,0xbe]
9633 # CHECK: s_brev_b32 exec_lo, s1 ; encoding: [0x01,0x08,0xfe,0xbe]
9636 # CHECK: s_brev_b32 exec_hi, s1 ; encoding: [0x01,0x08,0xff,0xbe]
9639 # CHECK: s_brev_b32 s5, s101 ; encoding: [0x65,0x08,0x85,0xbe]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td156 def S_BREV_B32 : SOP1_32 <"s_brev_b32",
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst380 s_brev_b32 dst, src0
DAMDGPUAsmGFX8.rst397 s_brev_b32 dst, src0
DAMDGPUAsmGFX9.rst539 s_brev_b32 dst, src0
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td115 defm S_BREV_B32 : SOP1_32 <sop1<0x0b, 0x08>, "s_brev_b32",