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Searched refs:s_flbit_i32_b32 (Results 1 – 18 of 18) sorted by relevance

/external/llvm/test/MC/AMDGPU/
Dsop1.s123 s_flbit_i32_b32 s1, s2 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dsop1.s126 s_flbit_i32_b32 s1, s2 label
Dgfx7_asm_all.s12006 s_flbit_i32_b32 s5, s1 label
12009 s_flbit_i32_b32 s103, s1 label
12012 s_flbit_i32_b32 flat_scratch_lo, s1 label
12015 s_flbit_i32_b32 flat_scratch_hi, s1 label
12018 s_flbit_i32_b32 vcc_lo, s1 label
12021 s_flbit_i32_b32 vcc_hi, s1 label
12024 s_flbit_i32_b32 tba_lo, s1 label
12027 s_flbit_i32_b32 tba_hi, s1 label
12030 s_flbit_i32_b32 tma_lo, s1 label
12033 s_flbit_i32_b32 tma_hi, s1 label
[all …]
Dgfx8_asm_all.s12621 s_flbit_i32_b32 s5, s1 label
12624 s_flbit_i32_b32 s101, s1 label
12627 s_flbit_i32_b32 flat_scratch_lo, s1 label
12630 s_flbit_i32_b32 flat_scratch_hi, s1 label
12633 s_flbit_i32_b32 vcc_lo, s1 label
12636 s_flbit_i32_b32 vcc_hi, s1 label
12639 s_flbit_i32_b32 tba_lo, s1 label
12642 s_flbit_i32_b32 tba_hi, s1 label
12645 s_flbit_i32_b32 tma_lo, s1 label
12648 s_flbit_i32_b32 tma_hi, s1 label
[all …]
Dgfx9_asm_all.s12619 s_flbit_i32_b32 s5, s1 label
12622 s_flbit_i32_b32 s101, s1 label
12625 s_flbit_i32_b32 flat_scratch_lo, s1 label
12628 s_flbit_i32_b32 flat_scratch_hi, s1 label
12631 s_flbit_i32_b32 vcc_lo, s1 label
12634 s_flbit_i32_b32 vcc_hi, s1 label
12637 s_flbit_i32_b32 m0, s1 label
12640 s_flbit_i32_b32 exec_lo, s1 label
12643 s_flbit_i32_b32 exec_hi, s1 label
12646 s_flbit_i32_b32 s5, s101 label
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dctlz_zero_undef.ll19 ; SI: s_flbit_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
96 ; SI-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
98 ; SI-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
Dctlz.ll21 ; SI-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]]
116 ; SI-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
118 ; SI-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dctlz.ll21 ; GCN-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]]
128 ; GCN-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
130 ; GCN-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
Dctlz_zero_undef.ll19 ; GCN: s_flbit_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
103 ; GCN-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
105 ; GCN-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt84 # VI: s_flbit_i32_b32 s1, s2 ; encoding: [0x02,0x12,0x81,0xbe]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt93 # VI: s_flbit_i32_b32 s1, s2 ; encoding: [0x02,0x12,0x81,0xbe]
Dgfx8_dasm_all.txt9357 # CHECK: s_flbit_i32_b32 s5, s1 ; encoding: [0x01,0x12,0x85,0xbe]
9360 # CHECK: s_flbit_i32_b32 s101, s1 ; encoding: [0x01,0x12,0xe5,0xbe]
9363 # CHECK: s_flbit_i32_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x12,0xe6,0xbe]
9366 # CHECK: s_flbit_i32_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x12,0xe7,0xbe]
9369 # CHECK: s_flbit_i32_b32 vcc_lo, s1 ; encoding: [0x01,0x12,0xea,0xbe]
9372 # CHECK: s_flbit_i32_b32 vcc_hi, s1 ; encoding: [0x01,0x12,0xeb,0xbe]
9375 # CHECK: s_flbit_i32_b32 tba_lo, s1 ; encoding: [0x01,0x12,0xec,0xbe]
9378 # CHECK: s_flbit_i32_b32 tba_hi, s1 ; encoding: [0x01,0x12,0xed,0xbe]
9381 # CHECK: s_flbit_i32_b32 tma_lo, s1 ; encoding: [0x01,0x12,0xee,0xbe]
9384 # CHECK: s_flbit_i32_b32 tma_hi, s1 ; encoding: [0x01,0x12,0xef,0xbe]
[all …]
Dgfx9_dasm_all.txt10248 # CHECK: s_flbit_i32_b32 s5, s1 ; encoding: [0x01,0x12,0x85,0xbe]
10251 # CHECK: s_flbit_i32_b32 s101, s1 ; encoding: [0x01,0x12,0xe5,0xbe]
10254 # CHECK: s_flbit_i32_b32 flat_scratch_lo, s1 ; encoding: [0x01,0x12,0xe6,0xbe]
10257 # CHECK: s_flbit_i32_b32 flat_scratch_hi, s1 ; encoding: [0x01,0x12,0xe7,0xbe]
10260 # CHECK: s_flbit_i32_b32 vcc_lo, s1 ; encoding: [0x01,0x12,0xea,0xbe]
10263 # CHECK: s_flbit_i32_b32 vcc_hi, s1 ; encoding: [0x01,0x12,0xeb,0xbe]
10266 # CHECK: s_flbit_i32_b32 m0, s1 ; encoding: [0x01,0x12,0xfc,0xbe]
10269 # CHECK: s_flbit_i32_b32 exec_lo, s1 ; encoding: [0x01,0x12,0xfe,0xbe]
10272 # CHECK: s_flbit_i32_b32 exec_hi, s1 ; encoding: [0x01,0x12,0xff,0xbe]
10275 # CHECK: s_flbit_i32_b32 s5, s101 ; encoding: [0x65,0x12,0x85,0xbe]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSOPInstructions.td178 def S_FLBIT_I32_B32 : SOP1_32 <"s_flbit_i32_b32",
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst390 s_flbit_i32_b32 dst, src0
DAMDGPUAsmGFX8.rst407 s_flbit_i32_b32 dst, src0
DAMDGPUAsmGFX9.rst549 s_flbit_i32_b32 dst, src0
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td136 defm S_FLBIT_I32_B32 : SOP1_32 <sop1<0x15, 0x12>, "s_flbit_i32_b32",