/external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
D | mismatched-intrinsics.ll | 7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32 8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32 10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2 11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2 17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) 18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AArch64/ |
D | mismatched-intrinsics.ll | 7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32 8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32 10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2 11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2 17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) 18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
/external/capstone/suite/MC/AArch64/ |
D | neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b 3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b 4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h 5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h 6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
/external/llvm/test/MC/AArch64/ |
D | neon-across.s | 9 saddlv h0, v1.8b 10 saddlv h0, v1.16b 11 saddlv s0, v1.4h 12 saddlv s0, v1.8h 13 saddlv d0, v1.4s define
|
D | neon-diagnostics.s | 3713 saddlv b0, v1.8b 3714 saddlv b0, v1.16b 3715 saddlv h0, v1.4h 3716 saddlv h0, v1.8h 3717 saddlv s0, v1.2s 3718 saddlv s0, v1.4s 3719 saddlv d0, v1.2s define
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-across.s | 9 saddlv h0, v1.8b 10 saddlv h0, v1.16b 11 saddlv s0, v1.4h 12 saddlv s0, v1.8h 13 saddlv d0, v1.4s define
|
D | neon-diagnostics.s | 3653 saddlv b0, v1.8b 3654 saddlv b0, v1.16b 3655 saddlv h0, v1.4h 3656 saddlv h0, v1.8h 3657 saddlv s0, v1.2s 3658 saddlv s0, v1.4s 3659 saddlv d0, v1.2s define
|
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-across.ll | 67 declare i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32>) 69 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16>) 71 declare i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8>) 77 declare i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16>) 79 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8>) 83 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.8b 85 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) 92 ; CHECK: saddlv s{{[0-9]+}}, {{v[0-9]+}}.4h 94 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) 117 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.16b [all …]
|
D | arm64-vaddlv.ll | 9 %vaddlv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32> %a1) nounwind 25 declare i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32>) nounwind readnone
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-across.ll | 67 declare i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32>) 69 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16>) 71 declare i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8>) 77 declare i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16>) 79 declare i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8>) 83 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.8b 85 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) 92 ; CHECK: saddlv s{{[0-9]+}}, {{v[0-9]+}}.4h 94 %saddlvv.i = tail call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) 117 ; CHECK: saddlv h{{[0-9]+}}, {{v[0-9]+}}.16b [all …]
|
D | arm64-vaddlv.ll | 9 %vaddlv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32> %a1) nounwind 25 declare i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32>) nounwind readnone
|
/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1158 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s 1159 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b 1160 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b 1161 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h 1162 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h
|
D | log-disasm | 1158 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s 1159 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b 1160 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b 1161 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h 1162 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h
|
D | log-cpufeatures-custom | 1157 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s ### {NEON} ### 1158 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b ### {NEON} ### 1159 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b ### {NEON} ### 1160 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h ### {NEON} ### 1161 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h ### {NEON} ###
|
D | log-cpufeatures | 1157 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s // Needs: NEON 1158 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b // Needs: NEON 1159 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b // Needs: NEON 1160 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h // Needs: NEON 1161 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h // Needs: NEON
|
D | log-cpufeatures-colour | 1157 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s [1;35mNEON[0;m 1158 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b [1;35mNEON[0;m 1159 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b [1;35mNEON[0;m 1160 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h [1;35mNEON[0;m 1161 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h [1;35mNEON[0;m
|
D | log-all | 3139 0x~~~~~~~~~~~~~~~~ 4eb038ec saddlv d12, v7.4s 3141 0x~~~~~~~~~~~~~~~~ 4e303b8e saddlv h14, v28.16b 3143 0x~~~~~~~~~~~~~~~~ 0e303bde saddlv h30, v30.8b 3145 0x~~~~~~~~~~~~~~~~ 0e70387b saddlv s27, v3.4h 3147 0x~~~~~~~~~~~~~~~~ 4e703a10 saddlv s16, v16.8h
|
/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1391 __ saddlv(d12, v7.V4S()); in GenerateTestSequenceNEON() local 1392 __ saddlv(h14, v28.V16B()); in GenerateTestSequenceNEON() local 1393 __ saddlv(h30, v30.V8B()); in GenerateTestSequenceNEON() local 1394 __ saddlv(s27, v3.V4H()); in GenerateTestSequenceNEON() local 1395 __ saddlv(s16, v16.V8H()); in GenerateTestSequenceNEON() local
|
D | test-cpu-features-aarch64.cc | 1581 TEST_NEON(saddlv_0, saddlv(h0, v1.V8B())) 1582 TEST_NEON(saddlv_1, saddlv(h0, v1.V16B())) 1583 TEST_NEON(saddlv_2, saddlv(s0, v1.V4H())) 1584 TEST_NEON(saddlv_3, saddlv(s0, v1.V8H())) 1585 TEST_NEON(saddlv_4, saddlv(d0, v1.V4S()))
|
/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 329 V(saddlv, Saddlv) \
|
D | simulator-arm64.h | 1616 LogicVRegister saddlv(VectorFormat vform, LogicVRegister dst,
|
D | assembler-arm64.h | 1985 void saddlv(const VRegister& vd, const VRegister& vn);
|
/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2321 LogicVRegister saddlv(VectorFormat vform,
|
D | assembler-aarch64.h | 2959 void saddlv(const VRegister& vd, const VRegister& vn);
|
D | macro-assembler-aarch64.h | 2721 V(saddlv, Saddlv) \
|