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Searched refs:sar (Results 1 – 25 of 123) sorted by relevance

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/external/ltp/testcases/kernel/hotplug/cpu_hotplug/functional/
Dcpuhotplug05.sh18 Desc: Does sar behave properly during CPU hotplug events?
62 tst_test_cmds sar
91 sar 1 0 >/dev/null 2>&1 &
95 if ps -C sar >/dev/null 2>&1; then
96 pkill sar
97 sar -P "$CPU_TO_TEST" 1 0 > "$LOG_FILE" &
99 sar -P "$CPU_TO_TEST" 1 > "$LOG_FILE" &
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dmasked-iv-safe.ll7 ; CHECK-NOT: {{and|movz|sar|shl}}
9 ; CHECK-NOT: {{and|movz|sar|shl}}
40 ; CHECK-NOT: {{and|movz|sar|shl}}
42 ; CHECK-NOT: {{and|movz|sar|shl}}
73 ; CHECK-NOT: {{and|movz|sar|shl}}
75 ; CHECK-NOT: {{and|movz|sar|shl}}
108 ; CHECK-NOT: {{and|movz|sar|shl}}
110 ; CHECK-NOT: {{and|movz|sar|shl}}
143 ; CHECK-NOT: {{and|movz|sar|shl}}
145 ; CHECK-NOT: {{and|movz|sar|shl}}
[all …]
Dsar_fold64.ll65 %sar = ashr i8 %neg, 6
66 ret i8 %sar
79 %sar = ashr <4 x i32> %neg, <i32 1, i32 31, i32 5, i32 0>
80 ret <4 x i32> %sar
Dfield-extract-use-trunc.ll1 ; RUN: llc < %s -mtriple=i686-- | grep sar | count 1
2 ; RUN: llc < %s -mtriple=x86_64-- | not grep sar
Ddagcombine-shifts.ll107 ; CHECK: sar
120 ; CHECK: sar
133 ; CHECK: sar
Dpr3216.ll8 ; CHECK: sar{{.}} $5
/external/llvm/test/CodeGen/X86/
Dmasked-iv-safe.ll7 ; CHECK-NOT: {{and|movz|sar|shl}}
9 ; CHECK-NOT: {{and|movz|sar|shl}}
40 ; CHECK-NOT: {{and|movz|sar|shl}}
42 ; CHECK-NOT: {{and|movz|sar|shl}}
73 ; CHECK-NOT: {{and|movz|sar|shl}}
75 ; CHECK-NOT: {{and|movz|sar|shl}}
108 ; CHECK-NOT: {{and|movz|sar|shl}}
110 ; CHECK-NOT: {{and|movz|sar|shl}}
143 ; CHECK-NOT: {{and|movz|sar|shl}}
145 ; CHECK-NOT: {{and|movz|sar|shl}}
[all …]
Dfield-extract-use-trunc.ll1 ; RUN: llc < %s -march=x86 | grep sar | count 1
2 ; RUN: llc < %s -march=x86-64 | not grep sar
Ddagcombine-shifts.ll107 ; CHECK: sar
120 ; CHECK: sar
133 ; CHECK: sar
Dpr3216.ll8 ; CHECK: sar{{.}} $5
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dvector-arith.ll331 ; CHECK: sar
332 ; CHECK: sar
333 ; CHECK: sar
334 ; CHECK: sar
335 ; CHECK: sar
336 ; CHECK: sar
337 ; CHECK: sar
338 ; CHECK: sar
339 ; CHECK: sar
340 ; CHECK: sar
[all …]
Dshift.ll52 ; CHECK: sar {{.*}},0x18
126 ; CHECK: sar {{.*}},0x1
137 ; CHECK: sar {{.*}},0xff
251 ; CHECK: sar {{.*}},1
265 ; CHECK: sar {{.*}},0x4
278 ; CHECK: sar {{.*}},0x1f
292 ; CHECK: sar {{.*}},0x1f
Dtest_i1.ll179 ; CHECK-NEXT: sar [[REG]],0x7
208 ; CHECK-NEXT: sar [[REG]],0xf
236 ; CHECK-NEXT: sar [[REG]],0x1f
261 ; CHECK-NEXT: sar [[REG]],0x1f
287 ; CHECK-NEXT: sar
324 ; CHECK-NEXT: sar [[REG]],0x1f
343 ; CHECK-NEXT: sar [[REG]],0x1f
/external/ltp/testcases/kernel/hotplug/cpu_hotplug/doc/
Dhotplug06.txt6 crash, and found that sar wouldn't register newly available cpus that
39 Start up sar writing to a temp log and give it a little time to run
44 Take a timestamp and count how many CPUs sar is reporting to be
54 Kill the sar process
/external/autotest/client/profilers/sar/
Dcontrol1 job.profilers.add('sar', 2)
3 job.profilers.delete('sar')
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dfield-extract-use-trunc.ll1 ; RUN: llc < %s -march=x86 | grep sar | count 1
2 ; RUN: llc < %s -march=x86-64 | not grep sar
Dpr3216.ll8 ; CHECK: sar{{.}} $5
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td200 "sar{b}\t{%cl, $dst|$dst, CL}",
203 "sar{w}\t{%cl, $dst|$dst, CL}",
206 "sar{l}\t{%cl, $dst|$dst, CL}",
209 "sar{q}\t{%cl, $dst|$dst, %CL}",
214 "sar{b}\t{$src2, $dst|$dst, $src2}",
217 "sar{w}\t{$src2, $dst|$dst, $src2}",
221 "sar{l}\t{$src2, $dst|$dst, $src2}",
225 "sar{q}\t{$src2, $dst|$dst, $src2}",
230 "sar{b}\t$dst",
233 "sar{w}\t$dst",
[all …]
/external/u-boot/arch/powerpc/include/asm/
Dfsl_dma.h38 uint sar; /* DMA source address register */ member
90 uint sar; /* DMA source address register */ member
/external/u-boot/arch/arm/dts/
Drk3288-tinker.dtsi376 nuvoton,sar-threshold-num = <4>;
377 nuvoton,sar-threshold = <0xa 0x14 0x26 0x73>;
378 nuvoton,sar-hysteresis = <0>;
379 nuvoton,sar-voltage = <6>;
380 nuvoton,sar-compare-time = <0>;
381 nuvoton,sar-sampling-time = <0>;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td227 "sar{b}\t{%cl, $dst|$dst, cl}",
231 "sar{w}\t{%cl, $dst|$dst, cl}",
235 "sar{l}\t{%cl, $dst|$dst, cl}",
239 "sar{q}\t{%cl, $dst|$dst, cl}",
245 "sar{b}\t{$src2, $dst|$dst, $src2}",
249 "sar{w}\t{$src2, $dst|$dst, $src2}",
253 "sar{l}\t{$src2, $dst|$dst, $src2}",
258 "sar{q}\t{$src2, $dst|$dst, $src2}",
264 "sar{b}\t$dst",
268 "sar{w}\t$dst",
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td224 "sar{b}\t{%cl, $dst|$dst, cl}",
227 "sar{w}\t{%cl, $dst|$dst, cl}",
231 "sar{l}\t{%cl, $dst|$dst, cl}",
235 "sar{q}\t{%cl, $dst|$dst, cl}",
240 "sar{b}\t{$src2, $dst|$dst, $src2}",
243 "sar{w}\t{$src2, $dst|$dst, $src2}",
247 "sar{l}\t{$src2, $dst|$dst, $src2}",
252 "sar{q}\t{$src2, $dst|$dst, $src2}",
257 "sar{b}\t$dst",
260 "sar{w}\t$dst",
[all …]
/external/smali/dexlib2/src/test/java/org/jf/dexlib2/
DAccessorTest.java84 … SyntheticAccessorResolver sar = new SyntheticAccessorResolver(f.getOpcodes(), f.getClasses()); in testAccessors() local
119 … SyntheticAccessorResolver.AccessedMember accessedMember = sar.getAccessedMember(accessorMethod); in testAccessors()
/external/u-boot/drivers/pwm/
Dpwm-imx.c45 writel(duty_cycles, &pwm->sar); in pwm_config()
/external/u-boot/arch/xtensa/include/asm/
Dptrace.h95 unsigned long sar; /* 44 */ member

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