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Searched refs:sat (Results 1 – 25 of 466) sorted by relevance

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/external/llvm/test/MC/Disassembler/Hexagon/
Dxtype_complex.txt6 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):sat
8 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):sat
10 # CHECK: r17:16 = vxaddsubh(r21:20, r31:30):rnd:>>1:sat
12 # CHECK: r17:16 = vxsubaddh(r21:20, r31:30):rnd:>>1:sat
16 # CHECK: r17:16 = vxaddsubw(r21:20, r31:30):sat
18 # CHECK: r17:16 = vxsubaddw(r21:20, r31:30):sat
22 # CHECK: r17:16 = cmpy(r21, r31):sat
24 # CHECK: r17:16 = cmpy(r21, r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21, r31*):sat
28 # CHECK: r17:16 = cmpy(r21, r31*):<<1:sat
[all …]
Dxtype_mpy.txt30 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):sat
32 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):<<1:sat
34 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):sat
36 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):<<1:sat
38 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):rnd:sat
40 # CHECK: r17:16 = vmpyweh(r21:20, r31:30):<<1:rnd:sat
42 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):rnd:sat
44 # CHECK: r17:16 = vmpywoh(r21:20, r31:30):<<1:rnd:sat
46 # CHECK: r17:16 += vmpyweh(r21:20, r31:30):sat
48 # CHECK: r17:16 += vmpyweh(r21:20, r31:30):<<1:sat
[all …]
Dxtype_alu.txt10 # CHECK: r17 = abs(r21):sat
30 # CHECK: r17:16 = add(r21:20, r31:30):sat
42 # CHECK: r17 = add(r21.l, r31.l):sat
44 # CHECK: r17 = add(r21.l, r31.h):sat
54 # CHECK: r17 = add(r21.l, r31.l):sat:<<16
56 # CHECK: r17 = add(r21.l, r31.h):sat:<<16
58 # CHECK: r17 = add(r21.h, r31.l):sat:<<16
60 # CHECK: r17 = add(r21.h, r31.h):sat:<<16
150 # CHECK: r17 = neg(r21):sat
154 # CHECK: r17 = round(r21:20):sat
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/
Dxtype_complex.txt6 # CHECK: r17:16 = vxaddsubh(r21:20,r31:30):sat
8 # CHECK: r17:16 = vxsubaddh(r21:20,r31:30):sat
10 # CHECK: r17:16 = vxaddsubh(r21:20,r31:30):rnd:>>1:sat
12 # CHECK: r17:16 = vxsubaddh(r21:20,r31:30):rnd:>>1:sat
16 # CHECK: r17:16 = vxaddsubw(r21:20,r31:30):sat
18 # CHECK: r17:16 = vxsubaddw(r21:20,r31:30):sat
22 # CHECK: r17:16 = cmpy(r21,r31):sat
24 # CHECK: r17:16 = cmpy(r21,r31):<<1:sat
26 # CHECK: r17:16 = cmpy(r21,r31*):sat
28 # CHECK: r17:16 = cmpy(r21,r31*):<<1:sat
[all …]
Dxtype_mpy.txt30 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):sat
32 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):<<1:sat
34 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):sat
36 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):<<1:sat
38 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):rnd:sat
40 # CHECK: r17:16 = vmpyweh(r21:20,r31:30):<<1:rnd:sat
42 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):rnd:sat
44 # CHECK: r17:16 = vmpywoh(r21:20,r31:30):<<1:rnd:sat
46 # CHECK: r17:16 += vmpyweh(r21:20,r31:30):sat
48 # CHECK: r17:16 += vmpyweh(r21:20,r31:30):<<1:sat
[all …]
Dxtype_alu.txt10 # CHECK: r17 = abs(r21):sat
30 # CHECK: r17:16 = add(r21:20,r31:30):sat
42 # CHECK: r17 = add(r21.l,r31.l):sat
44 # CHECK: r17 = add(r21.l,r31.h):sat
54 # CHECK: r17 = add(r21.l,r31.l):sat:<<16
56 # CHECK: r17 = add(r21.l,r31.h):sat:<<16
58 # CHECK: r17 = add(r21.h,r31.l):sat:<<16
60 # CHECK: r17 = add(r21.h,r31.h):sat:<<16
150 # CHECK: r17 = neg(r21):sat
154 # CHECK: r17 = round(r21:20):sat
[all …]
/external/stressapptest/src/
Dmain.cc21 Sat *sat = SatFactory(); in main() local
22 if (sat == NULL) { in main()
27 if (!sat->ParseArgs(argc, argv)) { in main()
29 sat->bad_status(); in main()
30 } else if (!sat->Initialize()) { in main()
32 sat->bad_status(); in main()
33 } else if (!sat->Run()) { in main()
35 sat->bad_status(); in main()
37 sat->PrintResults(); in main()
38 if (!sat->Cleanup()) { in main()
[all …]
/external/mesa3d/src/mesa/program/
Dprogram_lexer.l163 sat (_SAT)?
183 ABS{sat} { return_opcode( 1, VECTOR_OP, ABS, 3); }
184 ADD{sat} { return_opcode( 1, BIN_OP, ADD, 3); }
187 CMP{sat} { return_opcode(require_ARB_fp, TRI_OP, CMP, 3); }
188 COS{sat} { return_opcode(require_ARB_fp, SCALAR_OP, COS, 3); }
190 DP3{sat} { return_opcode( 1, BIN_OP, DP3, 3); }
191 DP4{sat} { return_opcode( 1, BIN_OP, DP4, 3); }
192 DPH{sat} { return_opcode( 1, BIN_OP, DPH, 3); }
193 DST{sat} { return_opcode( 1, BIN_OP, DST, 3); }
195 EX2{sat} { return_opcode( 1, SCALAR_OP, EX2, 3); }
[all …]
/external/llvm/test/MC/Hexagon/
Dv60-alu.s38 #CHECK: 1caeca00 { v1:0.h = vsub(v11:10.h,{{ *}}v15:14.h):sat }
39 v1:0.h=vsub(v11:10.h,v15:14.h):sat
41 #CHECK: 1ca8c43e { v31:30.w = vsub(v5:4.w,{{ *}}v9:8.w):sat }
42 v31:30.w=vsub(v5:4.w,v9:8.w):sat
50 #CHECK: 1c79c350 { v16.h = vsub(v3.h,{{ *}}v25.h):sat }
51 v16.h=vsub(v3.h,v25.h):sat
53 #CHECK: 1c7fd364 { v4.w = vsub(v19.w,{{ *}}v31.w):sat }
54 v4.w=vsub(v19.w,v31.w):sat
56 #CHECK: 1c67d816 { v22.ub = vsub(v24.ub,{{ *}}v7.ub):sat }
57 v22.ub=vsub(v24.ub,v7.ub):sat
[all …]
Dv60-vmpy1.s5 #CHECK: 1939c223 { v3.w = vdmpy(v3:2.h,{{ *}}r25.uh,{{ *}}#1):sat }
6 v3.w=vdmpy(v3:2.h,r25.uh,#1):sat
8 #CHECK: 1936de0d { v13.w = vdmpy(v30.h,{{ *}}r22.uh):sat }
9 v13.w=vdmpy(v30.h,r22.uh):sat
53 #CHECK: 1925d86b { v11.w = vdmpy(v25:24.h,{{ *}}r5.h):sat }
54 v11.w=vdmpy(v25:24.h,r5.h):sat
56 #CHECK: 1925c255 { v21.w = vdmpy(v2.h,{{ *}}r5.h):sat }
57 v21.w=vdmpy(v2.h,r5.h):sat
59 #CHECK: 1941d424 { v4.h = vmpy(v20.h,{{ *}}r1.h):<<1:sat }
60 v4.h=vmpy(v20.h,r1.h):<<1:sat
[all …]
Dv60-vmpy-acc.s5 #CHECK: 1936ee37 { v23.w += vdmpy(v15:14.h,r22.uh,#1):sat }
6 v23.w += vdmpy(v15:14.h,r22.uh,#1):sat
8 #CHECK: 193bf90f { v15.w += vdmpy(v25.h,r27.uh):sat }
9 v15.w += vdmpy(v25.h,r27.uh):sat
56 #CHECK: 1934fc62 { v2.w += vdmpy(v28.h,r20.h):sat }
57 v2.w += vdmpy(v28.h,r20.h):sat
59 #CHECK: 1925fe5f { v31.w += vdmpy(v31:30.h,r5.h):sat }
60 v31.w += vdmpy(v31:30.h,r5.h):sat
65 #CHECK: 1948e306 { v7:6.w += vmpy(v3.h,r8.h):sat }
66 v7:6.w += vmpy(v3.h,r8.h):sat
[all …]
Dv60-permute.s5 #CHECK: 1fd2d5cf { v15.b = vpack(v21.h{{ *}},{{ *}}v18.h):sat }
6 v15.b=vpack(v21.h,v18.h):sat
8 #CHECK: 1fd7d7a2 { v2.ub = vpack(v23.h{{ *}},{{ *}}v23.h):sat }
9 v2.ub=vpack(v23.h,v23.h):sat
17 #CHECK: 1fc9c5ed { v13.uh = vpack(v5.w{{ *}},{{ *}}v9.w):sat }
18 v13.uh=vpack(v5.w,v9.w):sat
20 #CHECK: 1ff1d81f { v31.h = vpack(v24.w{{ *}},{{ *}}v17.w):sat }
21 v31.h=vpack(v24.w,v17.w):sat
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/
Dv60-alu.s38 #CHECK: 1caeca00 { v1:0.h = vsub(v11:10.h,{{ *}}v15:14.h):sat }
39 v1:0.h=vsub(v11:10.h,v15:14.h):sat
41 #CHECK: 1ca8c43e { v31:30.w = vsub(v5:4.w,{{ *}}v9:8.w):sat }
42 v31:30.w=vsub(v5:4.w,v9:8.w):sat
50 #CHECK: 1c79c350 { v16.h = vsub(v3.h,{{ *}}v25.h):sat }
51 v16.h=vsub(v3.h,v25.h):sat
53 #CHECK: 1c7fd364 { v4.w = vsub(v19.w,{{ *}}v31.w):sat }
54 v4.w=vsub(v19.w,v31.w):sat
56 #CHECK: 1c67d816 { v22.ub = vsub(v24.ub,{{ *}}v7.ub):sat }
57 v22.ub=vsub(v24.ub,v7.ub):sat
[all …]
Dv62_all.s30 V0.b=vadd(V0.b,V0.b):sat
31 # CHECK: 1f00c000 { v0.b = vadd(v0.b,v0.b):sat }
35 V1:0.b=vadd(V1:0.b,V1:0.b):sat
36 # CHECK: 1ea0c000 { v1:0.b = vadd(v1:0.b,v1:0.b):sat }
65 V0.ub=vadd(V0.ub,V0.b):sat
66 # CHECK: 1ea0c080 { v0.ub = vadd(v0.ub,v0.b):sat }
75 V0.uw=vadd(V0.uw,V0.uw):sat
76 # CHECK: 1f60c020 { v0.uw = vadd(v0.uw,v0.uw):sat }
80 V1:0.uw=vadd(V1:0.uw,V1:0.uw):sat
81 # CHECK: 1ea0c040 { v1:0.uw = vadd(v1:0.uw,v1:0.uw):sat }
[all …]
Dv60-vmpy1.s5 #CHECK: 1939c223 { v3.w = vdmpy(v3:2.h,{{ *}}r25.uh,{{ *}}#1):sat }
6 v3.w=vdmpy(v3:2.h,r25.uh,#1):sat
8 #CHECK: 1936de0d { v13.w = vdmpy(v30.h,{{ *}}r22.uh):sat }
9 v13.w=vdmpy(v30.h,r22.uh):sat
53 #CHECK: 1925d86b { v11.w = vdmpy(v25:24.h,{{ *}}r5.h):sat }
54 v11.w=vdmpy(v25:24.h,r5.h):sat
56 #CHECK: 1925c255 { v21.w = vdmpy(v2.h,{{ *}}r5.h):sat }
57 v21.w=vdmpy(v2.h,r5.h):sat
59 #CHECK: 1941d424 { v4.h = vmpy(v20.h,{{ *}}r1.h):<<1:sat }
60 v4.h=vmpy(v20.h,r1.h):<<1:sat
[all …]
Dv60-vmpy-acc.s5 #CHECK: 1936ee37 { v23.w += vdmpy(v15:14.h,r22.uh,#1):sat }
6 v23.w += vdmpy(v15:14.h,r22.uh,#1):sat
8 #CHECK: 193bf90f { v15.w += vdmpy(v25.h,r27.uh):sat }
9 v15.w += vdmpy(v25.h,r27.uh):sat
56 #CHECK: 1934fc62 { v2.w += vdmpy(v28.h,r20.h):sat }
57 v2.w += vdmpy(v28.h,r20.h):sat
59 #CHECK: 1925fe5f { v31.w += vdmpy(v31:30.h,r5.h):sat }
60 v31.w += vdmpy(v31:30.h,r5.h):sat
65 #CHECK: 1948e306 { v7:6.w += vmpy(v3.h,r8.h):sat }
66 v7:6.w += vmpy(v3.h,r8.h):sat
[all …]
Dv60-permute.s5 #CHECK: 1fd2d5cf { v15.b = vpack(v21.h{{ *}},{{ *}}v18.h):sat }
6 v15.b=vpack(v21.h,v18.h):sat
8 #CHECK: 1fd7d7a2 { v2.ub = vpack(v23.h{{ *}},{{ *}}v23.h):sat }
9 v2.ub=vpack(v23.h,v23.h):sat
17 #CHECK: 1fc9c5ed { v13.uh = vpack(v5.w{{ *}},{{ *}}v9.w):sat }
18 v13.uh=vpack(v5.w,v9.w):sat
20 #CHECK: 1ff1d81f { v31.h = vpack(v24.w{{ *}},{{ *}}v17.w):sat }
21 v31.h=vpack(v24.w,v17.w):sat
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/intrinsics/
Dxtype_complex.ll13 ; CHECK: = vxaddsubh({{.*}},{{.*}}):sat
20 ; CHECK: = vxsubaddh({{.*}},{{.*}}):sat
27 ; CHECK: = vxaddsubh({{.*}},{{.*}}):rnd:>>1:sat
34 ; CHECK: = vxsubaddh({{.*}},{{.*}}):rnd:>>1:sat
42 ; CHECK: = vxaddsubw({{.*}},{{.*}}):sat
49 ; CHECK: = vxsubaddw({{.*}},{{.*}}):sat
57 ; CHECK: = cmpy({{.*}},{{.*}}):sat
64 ; CHECK: = cmpy({{.*}},{{.*}}):<<1:sat
71 ; CHECK: = cmpy({{.*}},{{.*}}*):sat
78 ; CHECK: = cmpy({{.*}},{{.*}}*):<<1:sat
[all …]
Dxtype_mpy.ll50 ; CHECK: = vmpyweh({{.*}},{{.*}}):sat
57 ; CHECK: = vmpyweh({{.*}},{{.*}}):<<1:sat
64 ; CHECK: = vmpywoh({{.*}},{{.*}}):sat
71 ; CHECK: = vmpywoh({{.*}},{{.*}}):<<1:sat
78 ; CHECK: = vmpyweh({{.*}},{{.*}}):rnd:sat
85 ; CHECK: = vmpyweh({{.*}},{{.*}}):<<1:rnd:sat
92 ; CHECK: = vmpywoh({{.*}},{{.*}}):rnd:sat
99 ; CHECK: = vmpywoh({{.*}},{{.*}}):<<1:rnd:sat
107 ; CHECK: = vmpyweuh({{.*}},{{.*}}):sat
114 ; CHECK: = vmpyweuh({{.*}},{{.*}}):<<1:sat
[all …]
/external/llvm/test/CodeGen/Hexagon/intrinsics/
Dxtype_complex.ll13 ; CHECK: = vxaddsubh({{.*}}, {{.*}}):sat
20 ; CHECK: = vxsubaddh({{.*}}, {{.*}}):sat
27 ; CHECK: = vxaddsubh({{.*}}, {{.*}}):rnd:>>1:sat
34 ; CHECK: = vxsubaddh({{.*}}, {{.*}}):rnd:>>1:sat
42 ; CHECK: = vxaddsubw({{.*}}, {{.*}}):sat
49 ; CHECK: = vxsubaddw({{.*}}, {{.*}}):sat
57 ; CHECK: = cmpy({{.*}}, {{.*}}):sat
64 ; CHECK: = cmpy({{.*}}, {{.*}}):<<1:sat
71 ; CHECK: = cmpy({{.*}}, {{.*}}*):sat
78 ; CHECK: = cmpy({{.*}}, {{.*}}*):<<1:sat
[all …]
Dxtype_mpy.ll50 ; CHECK: = vmpyweh({{.*}}, {{.*}}):sat
57 ; CHECK: = vmpyweh({{.*}}, {{.*}}):<<1:sat
64 ; CHECK: = vmpywoh({{.*}}, {{.*}}):sat
71 ; CHECK: = vmpywoh({{.*}}, {{.*}}):<<1:sat
78 ; CHECK: = vmpyweh({{.*}}, {{.*}}):rnd:sat
85 ; CHECK: = vmpyweh({{.*}}, {{.*}}):<<1:rnd:sat
92 ; CHECK: = vmpywoh({{.*}}, {{.*}}):rnd:sat
99 ; CHECK: = vmpywoh({{.*}}, {{.*}}):<<1:rnd:sat
107 ; CHECK: = vmpyweuh({{.*}}, {{.*}}):sat
114 ; CHECK: = vmpyweuh({{.*}}, {{.*}}):<<1:sat
[all …]
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_fragprog.c209 if (insn.sat) in nvfx_fp_emit()
453 int mask, sat, unit = 0; in nvfx_fragprog_parse_instruction() local
534 sat = finst->Instruction.Saturate; in nvfx_fragprog_parse_instruction()
538 nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none)); in nvfx_fragprog_parse_instruction()
543 nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, neg(tmp), none, none)); in nvfx_fragprog_parse_instruction()
550 insn = arith(sat, MOV, dst, mask, src[2], none, none); in nvfx_fragprog_parse_instruction()
554 insn = arith(sat, MOV, dst, mask, src[1], none, none); in nvfx_fragprog_parse_instruction()
559 nvfx_fp_emit(fpc, arith(sat, COS, dst, mask, src[0], none, none)); in nvfx_fragprog_parse_instruction()
564 …nvfx_fp_emit(fpc, arith(sat, DDX, tmp.reg, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, swz(src[0], Z, W, Z, W… in nvfx_fragprog_parse_instruction()
566 … nvfx_fp_emit(fpc, arith(sat, DDX, tmp.reg, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], none, none)); in nvfx_fragprog_parse_instruction()
[all …]
Dnvfx_vertprog.c317 if(insn.sat) { in nvfx_vp_emit()
470 bool sat = false; in nvfx_vertprog_parse_instruction() local
546 sat = true; in nvfx_vertprog_parse_instruction()
554 nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, src[0], none, src[1])); in nvfx_vertprog_parse_instruction()
562 nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, neg(tmp), none, none)); in nvfx_vertprog_parse_instruction()
569 insn = arith(sat, VEC, MOV, dst, mask, src[2], none, none); in nvfx_vertprog_parse_instruction()
573 insn = arith(sat, VEC, MOV, dst, mask, src[1], none, none); in nvfx_vertprog_parse_instruction()
578 nvfx_vp_emit(vpc, arith(sat, SCA, COS, dst, mask, none, none, src[0])); in nvfx_vertprog_parse_instruction()
583 …nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, swz(tmp, X, X, X, X), none, swz(tmp, Y, Y, Y, Y)… in nvfx_vertprog_parse_instruction()
586 nvfx_vp_emit(vpc, arith(sat, VEC, DP3, dst, mask, src[0], src[1], none)); in nvfx_vertprog_parse_instruction()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dswp-epilog-reuse3.ll10 declare i32 @llvm.hexagon.S2.asl.r.r.sat(i32, i32) #0
31 %v7 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 0, i32 %v6, i32 undef)
33 %v9 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v7, i32 undef, i32 undef)
35 %v11 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v9, i32 undef, i32 undef)
36 %v12 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v11, i32 undef)
41 %v17 = call i32 @llvm.hexagon.A2.sat(i64 %v16)
47 %v23 = call i32 @llvm.hexagon.A2.sat(i64 %v22)
49 %v25 = call i32 @llvm.hexagon.S2.asl.r.r.sat(i32 %v24, i32 undef)
61 declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32, i32, i32) #0
64 declare i32 @llvm.hexagon.S2.asr.r.r.sat(i32, i32) #0
[all …]
Dbit-rie.ll14 %0 = tail call i32 @llvm.hexagon.S2.asl.r.r.sat(i32 %conv, i32 1)
16 %2 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 3, i32 %1)
39 %8 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %6, i32 %conv7)
52 %10 = tail call i32 @llvm.hexagon.S2.asl.r.r.sat(i32 %9, i32 %conv17)
56 %12 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s0(i32 %L_temp.0142, i32 %conv23, i32 %conv23)
64 %13 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %conv3, i32 1)
89 %17 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %conv35, i32 16)
90 %18 = tail call i32 @llvm.hexagon.S2.asl.r.r.sat(i32 %17, i32 1)
97 %21 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %conv38, i32 %conv39)
98 %22 = tail call i32 @llvm.hexagon.S2.asl.r.r.sat(i32 %L_temp.2, i32 %conv38)
[all …]

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