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Searched refs:sbfm (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s10 sbfm w1, w2, #1, #15
11 sbfm x1, x2, #1, #15
Dbasic-a64-diagnostics.s761 sbfm x3, w13, #0, #0
762 sbfm w12, x9, #0, #0
763 sbfm sp, x3, #3, #5
764 sbfm w3, wsp, #1, #9
765 sbfm x9, x5, #-1, #0
766 sbfm x9, x5, #0, #-1
786 sbfm w3, w5, #32, #1
787 sbfm w7, w11, #19, #32
788 sbfm x29, x30, #64, #0
789 sbfm x10, x20, #63, #64
Dbasic-a64-instructions.s956 sbfm x1, x2, #3, #4
957 sbfm x3, x4, #63, #63
958 sbfm wzr, wzr, #31, #31
959 sbfm w12, w9, #0, #0
/external/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s10 sbfm w1, w2, #1, #15
11 sbfm x1, x2, #1, #15
Dbasic-a64-diagnostics.s756 sbfm x3, w13, #0, #0
757 sbfm w12, x9, #0, #0
758 sbfm sp, x3, #3, #5
759 sbfm w3, wsp, #1, #9
760 sbfm x9, x5, #-1, #0
761 sbfm x9, x5, #0, #-1
781 sbfm w3, w5, #32, #1
782 sbfm w7, w11, #19, #32
783 sbfm x29, x30, #64, #0
784 sbfm x10, x20, #63, #64
Dbasic-a64-instructions.s956 sbfm x1, x2, #3, #4
957 sbfm x3, x4, #63, #63
958 sbfm wzr, wzr, #31, #31
959 sbfm w12, w9, #0, #0
/external/vixl/doc/
Dchangelog.md39 + MacroAssembler support for `bfm`, `ubfm` and `sbfm`.
/external/v8/src/arm64/
Dassembler-arm64.h1367 void sbfm(const Register& rd, const Register& rn, int immr, int imms);
1391 sbfm(rd, rn, shift, rd.SizeInBits() - 1); in asr()
1398 sbfm(rd, rn, (rd.SizeInBits() - lsb) & (rd.SizeInBits() - 1), width - 1); in sbfiz()
1405 sbfm(rd, rn, lsb, lsb + width - 1); in sbfx()
1410 sbfm(rd, rn, 0, 7); in sxtb()
1415 sbfm(rd, rn, 0, 15); in sxth()
1420 sbfm(rd, rn, 0, 31); in sxtw()
Dassembler-arm64.cc1314 void Assembler::sbfm(const Register& rd, const Register& rn, int immr, in sbfm() function in v8::internal::Assembler
4304 case SXTW: sbfm(rd, rn_, non_shift_bits, high_bit); break; in EmitExtendShift()
/external/vixl/src/aarch64/
Dassembler-aarch64.h731 void sbfm(const Register& rd,
775 sbfm(rd, rn, shift, rd.GetSizeInBits() - 1); in asr()
785 sbfm(rd, in sbfiz()
798 sbfm(rd, rn, lsb, lsb + width - 1); in sbfx()
802 void sxtb(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 7); } in sxtb()
805 void sxth(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 15); } in sxth()
808 void sxtw(const Register& rd, const Register& rn) { sbfm(rd, rn, 0, 31); } in sxtw()
Dassembler-aarch64.cc671 void Assembler::sbfm(const Register& rd, in sbfm() function in vixl::aarch64::Assembler
5338 sbfm(rd, rn_, non_shift_bits, high_bit); in EmitExtendShift()
Dmacro-assembler-aarch64.h2154 sbfm(rd, rn, immr, imms); in Sbfm()
/external/capstone/suite/MC/AArch64/
Dbasic-a64-instructions.s.cs388 0x41,0x10,0x43,0x93 = sbfm x1, x2, #3, #4
389 0x83,0xfc,0x7f,0x93 = sbfm x3, x4, #63, #63
390 0xff,0x7f,0x1f,0x13 = sbfm wzr, wzr, #31, #31
391 0x2c,0x01,0x00,0x13 = sbfm w12, w9, #0, #0
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md1004 void sbfm(const Register& rd,
/external/vixl/test/aarch64/
Dtest-cpu-features-aarch64.cc423 TEST_NONE(sbfm_0, sbfm(w0, w1, 9, 11))
424 TEST_NONE(sbfm_1, sbfm(x0, x1, 22, 22))
Dtest-assembler-aarch64.cc10286 TEST(sbfm) { in TEST() argument
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1005 defm SBFM : BitfieldImm<0b00, "sbfm">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1201 defm SBFM : BitfieldImm<0b00, "sbfm">;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc11896 "dw\006saddw2\003sbc\004sbcs\004sbfm\005scvtf\004sdiv\005sdivr\004sdot\003"
16111 …{ 3660 /* sbfm */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR…
16112 …{ 3660 /* sbfm */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR…
22580 …{ 3660 /* sbfm */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR…
22581 …{ 3660 /* sbfm */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR…