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Searched refs:secctl (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-davinci/
Ddm365_lowlevel.c61 PLLSECCTL_TINITZ, &dv_pll0_regs->secctl); in dm365_pll1_init()
64 &dv_pll0_regs->secctl); in dm365_pll1_init()
66 writel(PLLSECCTL_STOPMODE, &dv_pll0_regs->secctl); in dm365_pll1_init()
68 writel(PLLSECCTL_STOPMODE | PLLSECCTL_TINITZ, &dv_pll0_regs->secctl); in dm365_pll1_init()
145 PLLSECCTL_TINITZ, &dv_pll1_regs->secctl); in dm365_pll2_init()
148 &dv_pll1_regs->secctl); in dm365_pll2_init()
150 writel(PLLSECCTL_STOPMODE, &dv_pll1_regs->secctl); in dm365_pll2_init()
152 writel(PLLSECCTL_STOPMODE | PLLSECCTL_TINITZ, &dv_pll1_regs->secctl); in dm365_pll2_init()
/external/u-boot/arch/arm/mach-keystone/
Dclock.c100 tmp = pllctl_reg_read(data->pll, secctl); in configure_main_pll()
110 pllctl_reg_setbits(data->pll, secctl, SECCTL_BYPASS_MASK); in configure_main_pll()
123 pllctl_reg_rmw(data->pll, secctl, SECCTL_OP_DIV_MASK, in configure_main_pll()
157 pllctl_reg_clrbits(data->pll, secctl, SECCTL_BYPASS_MASK); in configure_main_pll()
295 output_div = ((pllctl_reg_read(pll, secctl) & in pll_freq_get()
/external/u-boot/arch/arm/mach-davinci/include/mach/
Dpll_defs.h16 unsigned int secctl; /* 0x108 */ member
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock_defs.h17 u32 secctl; /* 08 */ member