/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
D | unrecognized_three-way-comparison.ll | 30 %select1 = select i1 %cmp2, i32 -1, i32 1 31 %select2 = select i1 %cmp1, i32 0, i32 %select1 58 %select1 = select i1 %cmp2, i32 -1, i32 1 59 %select2 = select i1 %cmp1, i32 0, i32 %select1 86 %select1 = select i1 %cmp2, i32 -1, i32 1 87 %select2 = select i1 %cmp1, i32 0, i32 %select1 114 %select1 = select i1 %cmp2, i32 -1, i32 1 115 %select2 = select i1 %cmp1, i32 0, i32 %select1 142 %select1 = select i1 %cmp2, i32 -1, i32 1 143 %select2 = select i1 %cmp1, i32 0, i32 %select1 [all …]
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D | cast-mul-select.ll | 28 define i32 @select1(i1 %cond, i32 %x, i32 %y, i32 %z) { 29 ; CHECK-LABEL: @select1(
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AMDGPU/ |
D | horizontal-store.ll | 40 %select1 = select i1 %cmp1, i32 %load1, i32 %load2 43 %cmp2 = icmp sgt i32 %select1, %load3 44 %select2 = select i1 %cmp2, i32 %select1, i32 %load3 87 %select1 = select i1 %cmp1, i64 %load1, i64 %load2 90 %cmp2 = icmp slt i64 %select1, %load3 91 %select2 = select i1 %cmp2, i64 %select1, i64 %load3 134 %select1 = select i1 %cmp1, float %load1, float %load2 137 %cmp2 = fcmp fast ogt float %select1, %load3 138 %select2 = select i1 %cmp2, float %select1, float %load3 181 %select1 = select i1 %cmp1, double %load1, double %load2 [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | promote-alloca-to-lds-select.ll | 68 ; CHECK: %select1 = select i1 undef, i32 addrspace(3)* %select0, i32 addrspace(3)* %ptr2 69 ; CHECK: store i32 0, i32 addrspace(3)* %select1, align 4 76 %select1 = select i1 undef, i32* %select0, i32* %ptr2 77 store i32 0, i32* %select1, align 4 97 %select1 = select i1 undef, i32* %phi.ptr, i32* %ptr1 98 store i32 0, i32* %select1, align 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | promote-alloca-to-lds-select.ll | 68 ; CHECK: %select1 = select i1 undef, i32 addrspace(3)* %select0, i32 addrspace(3)* %ptr2 69 ; CHECK: store i32 0, i32 addrspace(3)* %select1, align 4 76 %select1 = select i1 undef, i32* %select0, i32* %ptr2 77 store i32 0, i32* %select1, align 4 97 %select1 = select i1 undef, i32* %phi.ptr, i32* %ptr1 98 store i32 0, i32* %select1, align 4
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D | v_cndmask.ll | 399 %select1 = select i1 %setcc, float -2.0, float %z 401 store volatile float %select1, float addrspace(1)* %out.gep
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/external/swiftshader/third_party/LLVM/test/Transforms/InstSimplify/ |
D | rem.ll | 3 define i32 @select1(i32 %x, i1 %b) { 4 ; CHECK: @select1
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D | compare.ll | 172 define i1 @select1(i1 %cond) { 173 ; CHECK: @select1
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/external/llvm/test/Transforms/InstSimplify/ |
D | rem.ll | 4 define i32 @select1(i32 %x, i1 %b) { 5 ; CHECK-LABEL: @select1(
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D | compare.ll | 455 define i1 @select1(i1 %cond) { 456 ; CHECK-LABEL: @select1(
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_perfcounter.c | 515 unsigned select1 = in si_pc_emit_select() local 517 radeon_set_uconfig_reg_seq(cs, select1, count); in si_pc_emit_select() 528 unsigned select1, select1_count; in si_pc_emit_select() local 538 select1 = regs->select0 + 4 * regs->num_counters; in si_pc_emit_select() 540 radeon_set_uconfig_reg_seq(cs, select1, select1_count); in si_pc_emit_select()
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/external/llvm/test/CodeGen/AArch64/ |
D | aarch64-minmaxv.ll | 295 …%rdx.minmax.select1 = select <4 x i1> %rdx.minmax.cmp, <4 x float> %rdx.minmax.select, <4 x float>… 296 …%rdx.shuf1 = shufflevector <4 x float> %rdx.minmax.select1, <4 x float> undef, <4 x i32> <i32 1, i… 297 %rdx.minmax.cmp1 = fcmp fast oge <4 x float> %rdx.minmax.select1, %rdx.shuf1 299 %rdx.minmax.select1.elt = extractelement <4 x float> %rdx.minmax.select1, i32 0 300 %rdx.shuf1.elt = extractelement <4 x float> %rdx.minmax.select1, i32 1 301 %r = select i1 %rdx.minmax.cmp1.elt, float %rdx.minmax.select1.elt, float %rdx.shuf1.elt 311 …%rdx.minmax.select1 = select <4 x i1> %rdx.minmax.cmp, <4 x float> %rdx.minmax.select, <4 x float>… 312 …%rdx.shuf1 = shufflevector <4 x float> %rdx.minmax.select1, <4 x float> undef, <4 x i32> <i32 1, i… 313 %rdx.minmax.cmp1 = fcmp fast ole <4 x float> %rdx.minmax.select1, %rdx.shuf1 315 %rdx.minmax.select1.elt = extractelement <4 x float> %rdx.minmax.select1, i32 0 [all …]
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/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
D | cast-mul-select.ll | 16 define i32 @select1(i1 %cond, i32 %x, i32 %y, i32 %z) {
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/external/llvm/test/Transforms/InstCombine/ |
D | cast-mul-select.ll | 16 define i32 @select1(i1 %cond, i32 %x, i32 %y, i32 %z) {
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/external/tensorflow/tensorflow/compiler/tf2xla/kernels/ |
D | fake_quantize_ops.cc | 261 xla::XlaOp select1 = xla::Select(below_min, gradient, zeroes); in Compile() local 263 XlaHelpers::ConvertElementType(select1, accumulation_type), in Compile()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/PGOProfile/ |
D | select1.ll | 5 ; RUN: llvm-profdata merge %S/Inputs/select1.proftext -o %t.profdata
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/external/tensorflow/tensorflow/compiler/xla/tests/ |
D | tuple_test.cc | 388 auto select1 = Select(GetTupleElement(pred_tuple, 0), tuple12, tuple21); in XLA_TEST_F() local 389 auto select2 = Select(GetTupleElement(pred_tuple, 1), tuple21, select1); in XLA_TEST_F()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/ |
D | rem.ll | 116 define i32 @select1(i32 %x, i1 %b) { 117 ; CHECK-LABEL: @select1(
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D | compare.ll | 489 define i1 @select1(i1 %cond) { 490 ; CHECK-LABEL: @select1(
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CodeGenPrepare/ARM/ |
D | sink-addrmode.ll | 327 %select1 = select i1 %cmp2, i32* %gep1, i32* %gep2 328 %select2 = select i1 %cmp1, i32* %gep1, i32* %select1
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/external/tensorflow/tensorflow/python/kernel_tests/ |
D | control_flow_ops_py_test.py | 2295 select1 = variables.Variable([3.0, 4.0, 5.0]) 2303 ns1 = state_ops.scatter_update(select1, j, 10.0) 2314 result1 = self.evaluate(select1)
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/external/swiftshader/src/Reactor/ |
D | LLVMReactor.cpp | 4060 …RValue<UShort8> Swizzle(RValue<UShort8> x, char select0, char select1, char select2, char select3,… in Swizzle() argument 4066 select1 + 0, in Swizzle() 4067 select1 + 1, in Swizzle()
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D | Reactor.hpp | 984 …RValue<UShort8> Swizzle(RValue<UShort8> x, char select0, char select1, char select2, char select3,…
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D | SubzeroReactor.cpp | 4349 …RValue<UShort8> Swizzle(RValue<UShort8> x, char select0, char select1, char select2, char select3,… in Swizzle() argument
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