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Searched refs:setSubReg (Results 1 – 25 of 61) sorted by relevance

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/external/llvm/lib/Target/PowerPC/
DPPCVSXFMAMutate.cpp249 MI->getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
250 MI->getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
251 MI->getOperand(3).setSubReg(AddSubReg); in processBlock()
265 MI->getOperand(2).setSubReg(AddSubReg); in processBlock()
270 MI->getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
DPPCVSXCopy.cpp148 SrcMO.setSubReg(IsVRReg(DstMO.getReg(), MRI) ? PPC::sub_128 : in processBlock()
DPPCInstrInfo.cpp390 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
394 MI.getOperand(2).setSubReg(SubReg1); in commuteInstructionImpl()
395 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
1804 SubRegsToUpdate[i].first->setSubReg(SubRegsToUpdate[i].second); in optimizeCompareInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCVSXFMAMutate.cpp250 MI.getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
251 MI.getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
252 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
266 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
271 MI.getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
DPPCVSXCopy.cpp139 SrcMO.setSubReg(PPC::sub_64); in processBlock()
/external/llvm/lib/Target/Hexagon/
DHexagonPeephole.cpp306 Dst.setSubReg(Src.getSubReg()); in ChangeOpInto()
321 Dst.setSubReg(Src.getSubReg()); in ChangeOpInto()
DRDFCopy.cpp218 Op.setSubReg(SR.Sub); in run()
/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp545 Copy->getOperand(0).setSubReg(SubIdx); in INITIALIZE_PASS_DEPENDENCY()
808 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
946 NewCopy->getOperand(0).setSubReg(Def.SubReg); in RewriteSource()
1010 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1140 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
DTwoAddressInstructionPass.cpp1431 SrcMO.setSubReg(0); in collectTiedOperands()
1549 MO.setSubReg(0); in processTiedPairs()
1566 MO.setSubReg(0); in processTiedPairs()
1698 mi->getOperand(0).setSubReg(SubIdx); in runOnMachineFunction()
DTargetInstrInfo.cpp180 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
184 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
185 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
DVirtRegMap.cpp443 MO.setSubReg(0); in rewrite()
DLiveDebugVariables.cpp813 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
935 Loc.setSubReg(0); in rewriteLocations()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp143 Src0.setSubReg(0); in foldImmediates()
147 Src0.setSubReg(0); in foldImmediates()
/external/llvm/include/llvm/CodeGen/
DMachineOperand.h347 void setSubReg(unsigned subReg) { in setSubReg() function
628 Op.setSubReg(SubReg);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp591 Copy->getOperand(0).setSubReg(SubIdx); in INITIALIZE_PASS_DEPENDENCY()
858 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
948 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1075 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1241 NewCopy->getOperand(0).setSubReg(Def.SubReg); in rewriteSource()
DTwoAddressInstructionPass.cpp1486 SrcMO.setSubReg(0); in collectTiedOperands()
1604 MO.setSubReg(0); in processTiedPairs()
1621 MO.setSubReg(MO.getSubReg()); in processTiedPairs()
1761 mi->getOperand(0).setSubReg(SubIdx); in runOnMachineFunction()
DTargetInstrInfo.cpp210 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
214 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
215 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
DMachineOperand.cpp80 setSubReg(SubIdx); in substVirtReg()
89 setSubReg(0); in substPhysReg()
DLiveDebugVariables.cpp936 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
1073 Loc.setSubReg(0); in rewriteLocations()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineOperand.h460 void setSubReg(unsigned subReg) { in setSubReg() function
778 Op.setSubReg(SubReg);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DRDFCopy.cpp182 Op.setSubReg(0); in run()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DVirtRegRewriter.cpp958 MI->getOperand(NewOp.Operand).setSubReg(0); in GetRegForReload()
2072 MI.getOperand(i).setSubReg(0); in ProcessUses()
2158 MI.getOperand(i).setSubReg(0); in ProcessUses()
2184 MI.getOperand(i).setSubReg(0); in ProcessUses()
2242 MI.getOperand(i).setSubReg(0); in ProcessUses()
2586 MI.getOperand(i).setSubReg(0); in RewriteMBB()
DVirtRegMap.cpp310 MO.setSubReg(0); in rewrite()
DLiveDebugVariables.cpp776 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
898 Loc.setSubReg(0); in rewriteLocations()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineOperand.h295 void setSubReg(unsigned subReg) { in setSubReg() function

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