Home
last modified time | relevance | path

Searched refs:set_layout (Results 1 – 24 of 24) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_descriptor_set.c41 struct radv_descriptor_set_layout *set_layout; in radv_CreateDescriptorSetLayout() local
54 (max_binding + 1) * sizeof(set_layout->binding[0]); in radv_CreateDescriptorSetLayout()
57 set_layout = vk_alloc2(&device->alloc, pAllocator, size, 8, in radv_CreateDescriptorSetLayout()
59 if (!set_layout) in radv_CreateDescriptorSetLayout()
62 set_layout->flags = pCreateInfo->flags; in radv_CreateDescriptorSetLayout()
65 uint32_t *samplers = (uint32_t*)&set_layout->binding[max_binding + 1]; in radv_CreateDescriptorSetLayout()
67 set_layout->binding_count = max_binding + 1; in radv_CreateDescriptorSetLayout()
68 set_layout->shader_stages = 0; in radv_CreateDescriptorSetLayout()
69 set_layout->dynamic_shader_stages = 0; in radv_CreateDescriptorSetLayout()
70 set_layout->has_immutable_samplers = false; in radv_CreateDescriptorSetLayout()
[all …]
/external/mesa3d/src/intel/vulkan/
Danv_descriptor_set.c56 struct anv_descriptor_set_layout *set_layout; in anv_CreateDescriptorSetLayout() local
61 anv_multialloc_add(&ma, &set_layout, 1); in anv_CreateDescriptorSetLayout()
69 memset(set_layout, 0, sizeof(*set_layout)); in anv_CreateDescriptorSetLayout()
70 set_layout->binding_count = max_binding + 1; in anv_CreateDescriptorSetLayout()
74 memset(&set_layout->binding[b], -1, sizeof(set_layout->binding[b])); in anv_CreateDescriptorSetLayout()
76 set_layout->binding[b].array_size = 0; in anv_CreateDescriptorSetLayout()
77 set_layout->binding[b].immutable_samplers = NULL; in anv_CreateDescriptorSetLayout()
96 set_layout->binding[b].immutable_samplers = (void *)binding; in anv_CreateDescriptorSetLayout()
101 (void *)set_layout->binding[b].immutable_samplers; in anv_CreateDescriptorSetLayout()
110 set_layout->binding[b].type = binding->descriptorType; in anv_CreateDescriptorSetLayout()
[all …]
Danv_nir_apply_pipeline_layout.c362 struct anv_descriptor_set_layout *set_layout = layout->set[set].layout; in anv_nir_apply_pipeline_layout() local
366 set_layout->binding_count) { in anv_nir_apply_pipeline_layout()
367 if (set_layout->binding[b].stage[stage].surface_index >= 0) { in anv_nir_apply_pipeline_layout()
369 anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]); in anv_nir_apply_pipeline_layout()
371 if (set_layout->binding[b].stage[stage].sampler_index >= 0) { in anv_nir_apply_pipeline_layout()
373 anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]); in anv_nir_apply_pipeline_layout()
375 if (set_layout->binding[b].stage[stage].image_index >= 0) in anv_nir_apply_pipeline_layout()
376 map->image_count += set_layout->binding[b].array_size; in anv_nir_apply_pipeline_layout()
384 struct anv_descriptor_set_layout *set_layout = layout->set[set].layout; in anv_nir_apply_pipeline_layout() local
388 set_layout->binding_count) { in anv_nir_apply_pipeline_layout()
[all …]
Danv_cmd_buffer.c513 struct anv_descriptor_set_layout *set_layout = in anv_cmd_buffer_bind_descriptor_set() local
526 if (set_layout->dynamic_offset_count > 0) { in anv_cmd_buffer_bind_descriptor_set()
531 assert(set_layout->dynamic_offset_count <= *dynamic_offset_count); in anv_cmd_buffer_bind_descriptor_set()
532 assert(dynamic_offset_start + set_layout->dynamic_offset_count <= in anv_cmd_buffer_bind_descriptor_set()
536 *dynamic_offsets, set_layout->dynamic_offset_count); in anv_cmd_buffer_bind_descriptor_set()
538 *dynamic_offsets += set_layout->dynamic_offset_count; in anv_cmd_buffer_bind_descriptor_set()
539 *dynamic_offset_count -= set_layout->dynamic_offset_count; in anv_cmd_buffer_bind_descriptor_set()
548 set_layout->shader_stages & VK_SHADER_STAGE_ALL_GRAPHICS; in anv_cmd_buffer_bind_descriptor_set()
916 const struct anv_descriptor_set_layout *set_layout = in anv_CmdPushDescriptorSetKHR() local
927 set->layout = set_layout; in anv_CmdPushDescriptorSetKHR()
[all …]
Danv_nir_lower_ycbcr_textures.c324 const struct anv_descriptor_set_layout *set_layout = in try_lower_tex_ycbcr() local
327 &set_layout->binding[var->data.binding]; in try_lower_tex_ycbcr()
/external/tensorflow/tensorflow/core/kernels/
Dcudnn_pooling_gpu.cc76 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
80 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
195 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
200 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
Dpooling_ops_common.cc243 .set_layout(data_layout); in Compute()
250 .set_layout(data_layout); in Compute()
391 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
398 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
Dfused_batch_norm_op.cc308 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
315 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
462 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
469 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
Dconv_ops_fused_impl.h683 .set_layout(se::dnn::DataLayout::kBatchDepthYX);
694 .set_layout(se::dnn::DataLayout::kBatchDepthYX);
708 .set_layout(se::dnn::DataLayout::kBatchDepthYX);
Dlrn_op.cc199 .set_layout(se::dnn::DataLayout::kBatchYXDepth); in launch()
416 .set_layout(se::dnn::DataLayout::kBatchYXDepth); in launch()
Dconv_ops_3d.cc357 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in launch()
364 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in launch()
Dconv_grad_ops_3d.cc1260 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
1267 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
1659 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
1666 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in Compute()
Dconv_ops.cc768 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
774 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
Dconv_grad_filter_ops.cc721 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
727 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
Dconv_grad_input_ops.cc837 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
843 .set_layout(se::dnn::DataLayout::kBatchDepthYX); in operator ()()
/external/tensorflow/tensorflow/compiler/xla/service/gpu/
Dcudnn_conv_runner.cc182 input_descriptor.set_layout(input_dl) in RunCudnnConvImpl()
194 filter_descriptor.set_layout(filter_dl) in RunCudnnConvImpl()
219 output_descriptor.set_layout(output_dl) in RunCudnnConvImpl()
279 .set_layout(output_dl); in RunCudnnConvImpl()
Dcudnn_batchnorm_thunk.cc62 input_desc.set_layout(dnn::DataLayout::kBatchDepthYX) in MakeDescriptors()
69 scale_offset_desc.set_layout(dnn::DataLayout::kBatchDepthYX) in MakeDescriptors()
/external/tensorflow/tensorflow/contrib/fused_conv/kernels/
Dfused_conv2d_bias_activation_op.cc586 .set_layout(data_layout); in launch()
592 .set_layout(filter_layout); in launch()
598 .set_layout(data_layout); in launch()
604 .set_layout(dnn::DataLayout::kBatchDepthYX); in launch()
610 .set_layout(data_layout); in launch()
/external/tensorflow/tensorflow/stream_executor/
Ddnn.cc243 set_layout(DataLayout::kYXDepthBatch); in BatchDescriptor()
385 set_layout(FilterLayout::kOutputInputYX); in FilterDescriptor()
Ddnn.h307 BatchDescriptor& set_layout(DataLayout layout) {
415 FilterDescriptor& set_layout(FilterLayout layout) {
/external/pdfium/fxjs/
Dcjs_document.h76 CJS_Return set_layout(CJS_Runtime* pRuntime, v8::Local<v8::Value> vp);
Dcjs_document.cpp973 CJS_Return Document::set_layout(CJS_Runtime* pRuntime, in set_layout() function in Document
/external/tensorflow/tensorflow/stream_executor/rocm/
Drocm_dnn.cc2786 transformed_output_descriptor.set_layout(dnn::DataLayout::kBatchDepthYX); in MaybeTransformLayout()
2805 output_descriptor->set_layout(dnn::DataLayout::kBatchDepthYX); in MaybeTransformLayout()
3432 .set_layout(dnn::DataLayout::kBatchYXDepth); in DoBiasAdd()
4009 .set_layout(batch_descriptor.layout()); in DeriveOutputBatchDescriptor()
/external/tensorflow/tensorflow/stream_executor/cuda/
Dcuda_dnn.cc3672 .set_layout(dnn::DataLayout::kBatchYXDepth); in DoBiasAdd()
4105 .set_layout(batch_descriptor.layout()); in DeriveOutputBatchDescriptor()