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Searched refs:setting (Results 1 – 25 of 1678) sorted by relevance

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/external/u-boot/board/compulab/common/
Domap3_display.c268 static int parse_setting(char *setting) in parse_setting() argument
271 char *setting_start = setting; in parse_setting()
273 if (!strncmp(setting, "mode:", 5)) { in parse_setting()
274 return parse_mode(setting + 5); in parse_setting()
275 } else if (!strncmp(setting, "pixclock:", 9)) { in parse_setting()
276 return parse_pixclock(setting + 9); in parse_setting()
277 } else if (!strncmp(setting, "left:", 5)) { in parse_setting()
278 num_val = simple_strtoul(setting + 5, &setting, 0); in parse_setting()
280 } else if (!strncmp(setting, "right:", 6)) { in parse_setting()
281 num_val = simple_strtoul(setting + 6, &setting, 0); in parse_setting()
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/external/grpc-grpc/tools/codegen/core/
Dgen_settings_ids.py109 DecoratedSetting(hash(setting.id), name, setting)
110 for name, setting in _SETTINGS.iteritems()
117 decorated_setting.setting.id)
178 decorated_setting.setting.default,
179 decorated_setting.setting.min,
180 decorated_setting.setting.max,
181 decorated_setting.setting.on_error.behavior,
182 decorated_setting.setting.on_error.code,
/external/freetype/src/gxvalid/
Dgxvfeat.c55 FT_UShort setting; member
169 FT_UShort setting; in gxv_feat_setting_validate() local
176 setting = FT_NEXT_USHORT( p ); in gxv_feat_setting_validate()
179 if ( exclusive && ( setting & 1 ) == 0 ) in gxv_feat_setting_validate()
184 GXV_FEAT_DATA( setting ) = setting; in gxv_feat_setting_validate()
252 if ( (FT_Int)GXV_FEAT_DATA( setting ) <= last_setting ) in gxv_feat_name_validate()
255 last_setting = (FT_Int)GXV_FEAT_DATA( setting ); in gxv_feat_name_validate()
/external/libpng/scripts/
Dpnglibconf.dfa30 # setting <name> [requires ...] [default]
31 # #define PNG_<name> <value> /* value comes from current setting */
43 # doesn't change the meaning of the line. (NOT setting, where "," becomes
44 # part of the setting!) A comma at the end of an option line causes a
53 # The following setting, option and chunk values can all be changed
56 # setting: change 'setting' lines to fine tune library performance;
95 # provide override values for setting entries and turn option or
98 # setting FOO default VALUE
177 setting USER_CONFIG
178 setting USER_PRIVATEBUILD
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Doptions.awk76 setting[""] = "" # requires by setting
439 setting[$2] = reqs
820 for (i in setting) if (!doneset[i]) {
821 nreqs = split(setting[i], r)
846 print " * requires:" setting[i] >out
885 for (i in setting) if (!doneset[i]) {
886 print " setting", i, "requires" setting[i]
/external/u-boot/board/siemens/smartweb/
Dsmartweb.c242 struct sdramc_reg setting; in mem_init() local
244 setting.cr = SDRAM_BASE_CONF; in mem_init()
245 setting.mdr = AT91_SDRAMC_MD_SDRAM; in mem_init()
246 setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; in mem_init()
256 sdramc_initialize(ATMEL_BASE_CS1, &setting); in mem_init()
/external/u-boot/arch/arm/dts/
Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi19 model = "SOCFPGA Arria10 Dev Kit"; /* Bootloader setting: uboot.model */
22 cff-file = "socfpga.rbf"; /* Bootloader setting: uboot.rbf_filename */
294 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
295 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
299 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr.h…
300 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr.h…
304 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
305 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
309 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
310 …* Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdr…
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/external/autotest/server/site_tests/firmware_ECThermal/
Dfirmware_ECThermal.py76 setting = list()
89 setting.append(int(matched.group(1)) - 273)
92 if len(setting) == 0:
94 return setting
122 setting = self._get_setting_for_type(type_id)
123 if setting is None:
125 self._thermal_setting.append(setting)
/external/u-boot/board/siemens/taurus/
Dtaurus.c164 struct sdramc_reg setting; in sdramc_configure() local
167 setting.cr = SDRAM_BASE_CONF | mask; in sdramc_configure()
168 setting.mdr = AT91_SDRAMC_MD_SDRAM; in sdramc_configure()
169 setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; in sdramc_configure()
175 sdramc_initialize(ATMEL_BASE_CS1, &setting); in sdramc_configure()
/external/harfbuzz_ng/src/
Dhb-aat-layout-feat-table.hh45 { return (int) key - (int) setting; } in cmp()
48 { return (hb_aat_layout_feature_selector_t) (unsigned) setting; } in get_selector()
55 s->enable = (hb_aat_layout_feature_selector_t) (unsigned int) setting; in get_info()
70 HBUINT16 setting; /* The setting. */ member
Dhb-aat-map.cc41 info->setting = (hb_aat_layout_feature_selector_t) value; in add_feature()
50 info->setting = value ? mapping->selectorToEnable : mapping->selectorToDisable; in add_feature()
/external/u-boot/doc/
DREADME.marubun-pcmcia38 You should do the setting matched to your environment.
44 You should do the setting matched to your environment.
50 You should do the setting matched to your environment.
56 You should do the setting matched to your environment.
/external/u-boot/drivers/pinctrl/
Dpinctrl-at91.c210 u32 pin, u32 setting) in at91_mux_sama5d3_set_drivestrength() argument
219 if (!setting) in at91_mux_sama5d3_set_drivestrength()
223 set_drive_strength(reg, pin, setting); in at91_mux_sama5d3_set_drivestrength()
227 u32 pin, u32 setting) in at91_mux_sam9x5_set_drivestrength() argument
236 if (!setting) in at91_mux_sam9x5_set_drivestrength()
241 setting = DRIVE_STRENGTH_HI - setting; in at91_mux_sam9x5_set_drivestrength()
243 set_drive_strength(reg, pin, setting); in at91_mux_sam9x5_set_drivestrength()
/external/autotest/client/site_tests/cellular_MbimComplianceDataTransfer/
Dcontrol.DTS018 MBIM Compliance Test: Validation for alternate setting 1 of the
22 Validation for alternate setting 1 of the communication interface.
26 routed through the data interface in alternate setting 1 of the
/external/u-boot/board/freescale/mpc837xemds/
DREADME24 First, make sure the board default setting is consistent with the
25 document shipped with your board. Then apply the following setting:
26 SW3[1-8]= 0011_0000 (BOOTSEQ, ROMLOC setting)
27 SW4[1-8]= 0000_0110 (core PLL setting)
30 SW7[1-8]= 0110_1101 (TSEC1/2 interface setting - RGMII)
/external/autotest/client/site_tests/policy_SystemTimezone/
Dpolicy_SystemTimezone.py87 for setting in cases:
88 policy_value = setting['policy']
89 expected = setting['expected']
/external/u-boot/arch/arm/mach-rmobile/
DKconfig.32116 prompt "Qos setting primary"
123 Select normal mode for QoS setting.
128 Select multimedia primary mode for QoS setting.
133 Select GFX(graphics) primary mode for QoS setting.
/external/u-boot/doc/device-tree-bindings/
Dconfig.txt22 This setting will override any values configured via Kconfig.
29 if u-boot,mmc-env-offset* is present, this setting will take
41 device, specified in bytes. It is assumed that the setting
47 to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DPackaging.rst31 by setting ``DISABLE_ASSERTIONS=0|1`` in ``make``'s environment. This
32 defaults to enabled regardless of the optimization setting, but it slows
36 Builds LLVM with ``-g``. Also available by setting ``DEBUG_SYMBOLS=0|1`` in
42 debug symbols. Also available by setting ``ENABLE_OPTIMIZED=0|1`` in
/external/llvm/docs/
DPackaging.rst31 by setting ``DISABLE_ASSERTIONS=0|1`` in ``make``'s environment. This
32 defaults to enabled regardless of the optimization setting, but it slows
36 Builds LLVM with ``-g``. Also available by setting ``DEBUG_SYMBOLS=0|1`` in
42 debug symbols. Also available by setting ``ENABLE_OPTIMIZED=0|1`` in
/external/u-boot/board/freescale/mpc832xemds/
DREADME26 First, make sure the board default setting is consistent with the document
27 shipped with your board. Then apply the following setting:
28 SW3[1-8]= 0000_1000 (core PLL setting, core enable)
29 SW4[1-8]= 0001_0010 (Flash boot on local bus, system PLL setting)
32 SW7[1-8]= 1000_0011 (QE PLL setting)
/external/libcups/cups/
Dadminutil.c850 cups_option_t *setting; /* Current setting */ in cupsAdminGetServerSettings() local
1137 for (i = cg->cupsd_num_settings, setting = cg->cupsd_settings; in cupsAdminGetServerSettings()
1139 i --, setting ++) in cupsAdminGetServerSettings()
1140 *num_settings = cupsAddOption(setting->name, setting->value, in cupsAdminGetServerSettings()
1201 *setting; /* Current setting */ in cupsAdminSetServerSettings() local
1970 for (i = num_settings, setting = settings; i > 0; i --, setting ++) in cupsAdminSetServerSettings()
1971 if (setting->name[0] != '_' && in cupsAdminSetServerSettings()
1972 _cups_strcasecmp(setting->name, "Listen") && in cupsAdminSetServerSettings()
1973 _cups_strcasecmp(setting->name, "Port") && in cupsAdminSetServerSettings()
1974 !cupsGetOption(setting->name, cupsd_num_settings, cupsd_settings)) in cupsAdminSetServerSettings()
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/external/v8/tools/clang/traffic_annotation_extractor/tests/
Dtest-expected.txt18 setting: "setting1"
54 setting: "setting3"
74 setting: "setting4"
/external/u-boot/board/Barix/ipam390/
Dipam390-ais-uart.cfg17 ; This section allows setting the PLL0 system clock with a
32 ; This section allows setting up the PLL1. Usually this will
139 ; This section allows setting of a single PINMUX register.
140 ; This section can be included multiple times to allow setting
155 ; This section allows setting up the PLL1. Usually this will
/external/swiftshader/third_party/llvm-7.0/llvm/utils/lit/tests/Inputs/shtest-env/
Dmixed.txt1 # Check for setting and removing one environment variable
6 # Check for setting/unsetting multiple environment variables

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