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/external/llvm/test/CodeGen/AArch64/
Darm64-vhsub.ll5 ;CHECK: shsub.8b
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.shsub.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
14 ;CHECK: shsub.16b
17 %tmp3 = call <16 x i8> @llvm.aarch64.neon.shsub.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
23 ;CHECK: shsub.4h
26 %tmp3 = call <4 x i16> @llvm.aarch64.neon.shsub.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
32 ;CHECK: shsub.8h
35 %tmp3 = call <8 x i16> @llvm.aarch64.neon.shsub.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
41 ;CHECK: shsub.2s
44 %tmp3 = call <2 x i32> @llvm.aarch64.neon.shsub.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vhsub.ll5 ;CHECK: shsub.8b
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.shsub.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
14 ;CHECK: shsub.16b
17 %tmp3 = call <16 x i8> @llvm.aarch64.neon.shsub.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
23 ;CHECK: shsub.4h
26 %tmp3 = call <4 x i16> @llvm.aarch64.neon.shsub.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
32 ;CHECK: shsub.8h
35 %tmp3 = call <8 x i16> @llvm.aarch64.neon.shsub.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
41 ;CHECK: shsub.2s
44 %tmp3 = call <2 x i32> @llvm.aarch64.neon.shsub.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-halving-add-sub.s.cs14 0x20,0x24,0x22,0x0e = shsub v0.8b, v1.8b, v2.8b
15 0x20,0x24,0x22,0x4e = shsub v0.16b, v1.16b, v2.16b
16 0x20,0x24,0x62,0x0e = shsub v0.4h, v1.4h, v2.4h
17 0x20,0x24,0x62,0x4e = shsub v0.8h, v1.8h, v2.8h
18 0x20,0x24,0xa2,0x0e = shsub v0.2s, v1.2s, v2.2s
19 0x20,0x24,0xa2,0x4e = shsub v0.4s, v1.4s, v2.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-halving-add-sub.s44 shsub v0.8b, v1.8b, v2.8b
45 shsub v0.16b, v1.16b, v2.16b
46 shsub v0.4h, v1.4h, v2.4h
47 shsub v0.8h, v1.8h, v2.8h
48 shsub v0.2s, v1.2s, v2.2s
49 shsub v0.4s, v1.4s, v2.4s
Darm64-advsimd.s341 shsub.8b v0, v0, v0
412 ; CHECK: shsub.8b v0, v0, v0 ; encoding: [0x00,0x24,0x20,0x0e]
Dneon-diagnostics.s804 shsub v11.4h, v12.8h, v13.4h
/external/llvm/test/MC/AArch64/
Dneon-halving-add-sub.s44 shsub v0.8b, v1.8b, v2.8b
45 shsub v0.16b, v1.16b, v2.16b
46 shsub v0.4h, v1.4h, v2.4h
47 shsub v0.8h, v1.8h, v2.8h
48 shsub v0.2s, v1.2s, v2.2s
49 shsub v0.4s, v1.4s, v2.4s
Darm64-advsimd.s341 shsub.8b v0, v0, v0
412 ; CHECK: shsub.8b v0, v0, v0 ; encoding: [0x00,0x24,0x20,0x0e]
Dneon-diagnostics.s799 shsub v11.4h, v12.8h, v13.4h
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour1195 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b
1196 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s
1197 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h
1198 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s
1199 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b
1200 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h
Dlog-disasm1195 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b
1196 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s
1197 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h
1198 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s
1199 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b
1200 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h
Dlog-cpufeatures-custom1194 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b ### {NEON} ###
1195 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s ### {NEON} ###
1196 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h ### {NEON} ###
1197 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s ### {NEON} ###
1198 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b ### {NEON} ###
1199 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h ### {NEON} ###
Dlog-cpufeatures1194 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b // Needs: NEON
1195 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s // Needs: NEON
1196 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h // Needs: NEON
1197 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s // Needs: NEON
1198 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b // Needs: NEON
1199 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h // Needs: NEON
Dlog-cpufeatures-colour1194 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b NEON
1195 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s NEON
1196 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h NEON
1197 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s NEON
1198 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b NEON
1199 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h NEON
Dlog-all3213 0x~~~~~~~~~~~~~~~~ 4e3726de shsub v30.16b, v22.16b, v23.16b
3215 0x~~~~~~~~~~~~~~~~ 0eb92776 shsub v22.2s, v27.2s, v25.2s
3217 0x~~~~~~~~~~~~~~~~ 0e6126cd shsub v13.4h, v22.4h, v1.4h
3219 0x~~~~~~~~~~~~~~~~ 4eb7250a shsub v10.4s, v8.4s, v23.4s
3221 0x~~~~~~~~~~~~~~~~ 0e3f2526 shsub v6.8b, v9.8b, v31.8b
3223 0x~~~~~~~~~~~~~~~~ 4e6827e8 shsub v8.8h, v31.8h, v8.8h
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1428 __ shsub(v30.V16B(), v22.V16B(), v23.V16B()); in GenerateTestSequenceNEON() local
1429 __ shsub(v22.V2S(), v27.V2S(), v25.V2S()); in GenerateTestSequenceNEON() local
1430 __ shsub(v13.V4H(), v22.V4H(), v1.V4H()); in GenerateTestSequenceNEON() local
1431 __ shsub(v10.V4S(), v8.V4S(), v23.V4S()); in GenerateTestSequenceNEON() local
1432 __ shsub(v6.V8B(), v9.V8B(), v31.V8B()); in GenerateTestSequenceNEON() local
1433 __ shsub(v8.V8H(), v31.V8H(), v8.V8H()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc1624 TEST_NEON(shsub_0, shsub(v0.V8B(), v1.V8B(), v2.V8B()))
1625 TEST_NEON(shsub_1, shsub(v0.V16B(), v1.V16B(), v2.V16B()))
1626 TEST_NEON(shsub_2, shsub(v0.V4H(), v1.V4H(), v2.V4H()))
1627 TEST_NEON(shsub_3, shsub(v0.V8H(), v1.V8H(), v2.V8H()))
1628 TEST_NEON(shsub_4, shsub(v0.V2S(), v1.V2S(), v2.V2S()))
1629 TEST_NEON(shsub_5, shsub(v0.V4S(), v1.V4S(), v2.V4S()))
Dtest-simulator-aarch64.cc4519 DEFINE_TEST_NEON_3SAME_NO2D(shsub, Basic)
/external/v8/src/arm64/
Dmacro-assembler-arm64.h438 V(shsub, Shsub) \
Dassembler-arm64.h2767 void shsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt314 # CHECK: shsub v0.4h, v1.4h, v2.4h
316 # CHECK: shsub v9.2s, v11.2s, v21.2s
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt314 # CHECK: shsub v0.4h, v1.4h, v2.4h
316 # CHECK: shsub v9.2s, v11.2s, v21.2s
/external/vixl/src/aarch64/
Dassembler-aarch64.h2434 void shsub(const VRegister& vd, const VRegister& vn, const VRegister& vm);
Dmacro-assembler-aarch64.h2587 V(shsub, Shsub) \
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md2942 void shsub(const VRegister& vd, const VRegister& vn, const VRegister& vm)

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