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Searched refs:shuffle1 (Results 1 – 25 of 25) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr31956.ll23 …%shuffle1 = shufflevector <8 x float> %shuffle, <8 x float> %L, <4 x i32> <i32 12, i32 10, i32 14,…
24 ret <4 x float> %shuffle1
Dinsertps-combine.ll108 …%shuffle1 = shufflevector <4 x float> %shuffle, <4 x float> <float 0.000000e+00, float undef, floa…
109 ret <4 x float> %shuffle1
123 …%shuffle1 = shufflevector <4 x float> %shuffle, <4 x float> <float undef, float undef, float 0.000…
124 ret <4 x float> %shuffle1
Dvector-shuffle-256-v4.ll1726 %shuffle1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1727 %add = fadd <4 x double> %shuffle, %shuffle1
1775 %shuffle1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 5, i32 7, i32 1, i32 3>
1776 %add = fadd <4 x double> %shuffle, %shuffle1
1828 %shuffle1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1829 %add = add <4 x i64> %shuffle, %shuffle1
1881 %shuffle1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 5, i32 7, i32 1, i32 3>
1882 %add = add <4 x i64> %shuffle, %shuffle1
Davx512-intrinsics-fast-isel.ll6461 …%shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
6462 %add.i = add <4 x i64> %shuffle.i, %shuffle1.i
6541 …%shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
6542 %mul.i = mul <4 x i64> %shuffle.i, %shuffle1.i
6579 …%shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
6580 %or.i = or <4 x i64> %shuffle.i, %shuffle1.i
6617 …%shuffle1.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
6618 %and.i = and <4 x i64> %shuffle.i, %shuffle1.i
6662 %shuffle1.i = shufflevector <8 x i64> %1, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
6663 %add.i = add <4 x i64> %shuffle.i, %shuffle1.i
[all …]
Dvector-shuffle-256-v8.ll2533 …%shuffle1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i…
2534 %add = fadd <8 x float> %shuffle, %shuffle1
2582 …%shuffle1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 9, i32 11, i32 13, i32 15…
2583 %add = fadd <8 x float> %shuffle, %shuffle1
2635 …%shuffle1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9…
2636 %add = add <8 x i32> %shuffle, %shuffle1
2688 …%shuffle1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 9, i32 11, i32 13, i32 15, i3…
2689 %add = add <8 x i32> %shuffle, %shuffle1
Dvector-shuffle-128-v4.ll1067 …%shuffle1 = shufflevector <4 x float> %a, <4 x float> %shuffle, <4 x i32> <i32 0, i32 5, i32 6, i3…
1068 ret <4 x float> %shuffle1
1109 …%shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32…
1110 ret <4 x float> %shuffle1
1154 …%shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32…
1155 ret <4 x float> %shuffle1
DMergeConsecutiveStores.ll738 …%shuffle1 = shufflevector <8 x float> %v1, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 …
742 store <4 x float> %shuffle1, <4 x float>* %idx1, align 16
Dvector-shuffle-combining.ll1615 %shuffle1 = shufflevector <8 x float> %v, <8 x float> undef, <2 x i32> <i32 2, i32 3>
1617 store <2 x float> %shuffle1, <2 x float>* %idx2, align 8
/external/llvm/test/CodeGen/AArch64/
Dmerge-store.ll35 %shuffle1 = shufflevector <4 x float> %v1, <4 x float> undef, <2 x i32> <i32 2, i32 3>
38 store <2 x float> %shuffle1, <2 x float>* %idx1, align 8
Darm64-vmul.ll1607 %shuffle1 = shufflevector <8 x i16> %c, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
1608 …%shuffle2 = shufflevector <4 x i16> %shuffle1, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i3…
1620 %shuffle1 = shufflevector <4 x i32> %c, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
1621 …%shuffle2 = shufflevector <2 x i32> %shuffle1, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i3…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dmerge-store.ll34 %shuffle1 = shufflevector <4 x float> %v1, <4 x float> undef, <2 x i32> <i32 2, i32 3>
37 store <2 x float> %shuffle1, <2 x float>* %idx1, align 8
Darm64-vmul.ll1607 %shuffle1 = shufflevector <8 x i16> %c, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
1608 …%shuffle2 = shufflevector <4 x i16> %shuffle1, <4 x i16> undef, <8 x i32> <i32 1, i32 1, i32 1, i3…
1620 %shuffle1 = shufflevector <4 x i32> %c, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
1621 …%shuffle2 = shufflevector <2 x i32> %shuffle1, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i3…
/external/libhevc/common/x86/
Dihevc_tables_x86_intr.c114 const WORD32 shuffle1[4] = { 0x05040100, 0x0d0c0908, 0x07060302, 0x0f0e0b0a }; variable
Dihevc_deblk_ssse3_intr.c474 tmp3_const_8x16b = _mm_load_si128((__m128i *)(shuffle1)); in ihevc_deblk_luma_vert_ssse3()
909 coefdelta_0_8x16b = _mm_load_si128((__m128i *)(shuffle1)); in ihevc_deblk_luma_horz_ssse3()
/external/libhevc/common/
Dihevc_tables_x86_intr.h62 extern MEM_ALIGN16 const WORD32 shuffle1[4];
/external/webp/src/dsp/
Dlossless_neon.c96 const uint8x8_t shuffle1 = vld1_u8(kBGRShuffle[1]); in ConvertBGRAToBGR_NEON() local
106 vst1_u8(dst + 8, vtbl4_u8(pixels, shuffle1)); in ConvertBGRAToBGR_NEON()
123 const uint8x8_t shuffle1 = vld1_u8(kRGBShuffle[1]); in ConvertBGRAToRGB_NEON() local
133 vst1_u8(dst + 8, vtbl4_u8(pixels, shuffle1)); in ConvertBGRAToRGB_NEON()
/external/libaom/libaom/aom_dsp/x86/
Daom_subpixel_8t_intrin_ssse3.c198 __m128i firstFilters, secondFilters, shuffle1, shuffle2; in aom_filter_block1d4_h8_intrin_ssse3() local
222 shuffle1 = _mm_load_si128((__m128i const *)filt1_4_h8); in aom_filter_block1d4_h8_intrin_ssse3()
229 srcRegFilt1 = _mm_shuffle_epi8(srcReg, shuffle1); in aom_filter_block1d4_h8_intrin_ssse3()
/external/llvm/test/Transforms/InstCombine/
Dvec_shuffle.ll385 %shuffle1 = shufflevector <8 x i16> %in1, <8 x i16> %in1, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
386 %mul = mul <4 x i16> %shuffle, %shuffle1
394 …%shuffle1 = shufflevector <8 x i8> %shuffle, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4…
395 ret <8 x i8> %shuffle1
/external/libvpx/libvpx/vpx_dsp/x86/
Dvpx_subpixel_8t_intrin_ssse3.c53 __m128i firstFilters, secondFilters, shuffle1, shuffle2; in vpx_filter_block1d4_h8_intrin_ssse3() local
77 shuffle1 = _mm_setr_epi8(0, 1, 1, 2, 2, 3, 3, 4, 2, 3, 3, 4, 4, 5, 5, 6); in vpx_filter_block1d4_h8_intrin_ssse3()
84 srcRegFilt1 = _mm_shuffle_epi8(srcReg, shuffle1); in vpx_filter_block1d4_h8_intrin_ssse3()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dvec_shuffle.ll521 %shuffle1 = shufflevector <8 x i16> %in1, <8 x i16> %in1, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
522 %mul = mul <4 x i16> %shuffle, %shuffle1
533 …%shuffle1 = shufflevector <8 x i8> %shuffle, <8 x i8> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4…
534 ret <8 x i8> %shuffle1
/external/llvm/test/CodeGen/X86/
Dvector-shuffle-128-v4.ll1077 …%shuffle1 = shufflevector <4 x float> %a, <4 x float> %shuffle, <4 x i32> <i32 0, i32 5, i32 6, i3…
1078 ret <4 x float> %shuffle1
1119 …%shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32…
1120 ret <4 x float> %shuffle1
1164 …%shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32…
1165 ret <4 x float> %shuffle1
DMergeConsecutiveStores.ll481 …%shuffle1 = shufflevector <8 x float> %v1, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 …
485 store <4 x float> %shuffle1, <4 x float>* %idx1, align 16
Dvector-shuffle-combining.ll1823 %shuffle1 = shufflevector <8 x float> %v, <8 x float> undef, <2 x i32> <i32 2, i32 3>
1825 store <2 x float> %shuffle1, <2 x float>* %idx2, align 8
/external/llvm/test/Transforms/Scalarizer/
Dbasic.ll72 %shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc,
76 %f1 = bitcast <2 x double> %shuffle1 to <4 x float>
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Scalarizer/
Dbasic.ll72 %shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc,
76 %f1 = bitcast <2 x double> %shuffle1 to <4 x float>