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Searched refs:smulls (Results 1 – 12 of 12) sorted by relevance

/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs706 0x90,0x32,0xd9,0xe0 = smulls r3, r9, r0, r2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1797 smulls r3, r9, r0, r2
1802 @ CHECK: smulls r3, r9, r0, r2 @ encoding: [0x90,0x32,0xd9,0xe0]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3219 void smulls(
3221 void smulls(Register rdlo, Register rdhi, Register rn, Register rm) { in smulls() function
3222 smulls(al, rdlo, rdhi, rn, rm); in smulls()
Ddisasm-aarch32.h1172 void smulls(
Dassembler-aarch32.cc10601 void Assembler::smulls( in smulls() function in vixl::aarch32::Assembler
10616 Delegate(kSmulls, &Assembler::smulls, cond, rdlo, rdhi, rn, rm); in smulls()
Dmacro-assembler-aarch32.h4027 smulls(cond, rdlo, rdhi, rn, rm); in Smulls()
Ddisasm-aarch32.cc2813 void Disassembler::smulls( in smulls() function in vixl::aarch32::Disassembler
60198 smulls(condition, in DecodeA32()
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2570 smulls r3, r9, r0, r2
2575 @ CHECK: smulls r3, r9, r0, r2 @ encoding: [0x90,0x32,0xd9,0xe0]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2572 smulls r3, r9, r0, r2
2577 @ CHECK: smulls r3, r9, r0, r2 @ encoding: [0x90,0x32,0xd9,0xe0]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1626 # CHECK: smulls r3, r9, r0, r2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1778 # CHECK: smulls r3, r9, r0, r2
/external/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1778 # CHECK: smulls r3, r9, r0, r2