Searched refs:src1_abs (Results 1 – 19 of 19) sorted by relevance
| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 65 uint32_t src1_abs : 1; member
559 .abs = instr->src1_abs, in print_instr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrFormats.td | 124 bits<1> src1_abs;
131 let Word1{1} = src1_abs;
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| D | R600ExpandSpecialInstrs.cpp | 341 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src1_abs); in runOnMachineFunction()
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| D | VIInstrFormats.td | 203 let Inst{55} = src1_modifiers{1}; // src1_abs
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| D | R600InstrInfo.cpp | 1329 OPERAND_CASE(AMDGPU::OpName::src1_abs) in getSlotedOps()
1368 AMDGPU::OpName::src1_abs, in buildSlotOfVectorInstruction()
1471 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src1_abs); in getFlagOp()
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| D | R600Instructions.td | 112 let src1_abs = 0;
140 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, ABS:$src1_abs, SEL:$src1_sel,
146 "$src1_neg$src1_abs$src1$src1_abs$src1_rel, "
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| D | EvergreenInstructions.td | 410 let src1_abs = 0;
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| D | R600ISelLowering.cpp | 2393 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1_abs), in PostISelFolding()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrFormats.td | 134 bits<1> src1_abs;
141 let Word1{1} = src1_abs;
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| D | R600ExpandSpecialInstrs.cpp | 278 SetFlagInNewMI(NewMI, &MI, R600::OpName::src1_abs); in runOnMachineFunction()
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| D | R600InstrInfo.cpp | 1308 OPERAND_CASE(R600::OpName::src1_abs) in getSlotedOps()
1347 R600::OpName::src1_abs, in buildSlotOfVectorInstruction()
1446 FlagIndex = getOperandIdx(MI, R600::OpName::src1_abs); in getFlagOp()
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| D | R600Instructions.td | 123 let src1_abs = 0;
151 R600_Reg32:$src1, NEG:$src1_neg, REL:$src1_rel, ABS:$src1_abs, SEL:$src1_sel,
157 "$src1_neg$src1_abs$src1$src1_abs$src1_rel, "
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| D | VOPInstructions.td | 503 let Inst{55} = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
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| D | EvergreenInstructions.td | 484 let src1_abs = 0;
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| D | R600ISelLowering.cpp | 2280 TII->getOperandIdx(Opcode, R600::OpName::src1_abs), in PostISelFolding()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | disasm-a3xx.c | 266 cat2->src1_abs, false); in print_instr_cat2()
270 cat2->src1_abs, cat2->rel1.src1_rel); in print_instr_cat2()
274 cat2->src1_abs, false); in print_instr_cat2()
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| D | instr-a3xx.h | 373 uint32_t src1_abs : 1; /* absolute value */ member
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| D | ir3.c | 226 cat2->src1_abs = !!(src1->flags & (IR3_REG_FABS | IR3_REG_SABS)); in emit_cat2()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_inst.h | 131 F(src1_abs, 109, 109)
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