/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_draw.h | 48 enum pc_di_src_sel src_sel, uint32_t count, in fd_draw() argument 83 OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances), in fd_draw() 86 OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances)); in fd_draw() 123 enum pc_di_src_sel src_sel; in fd_draw_emit() local 133 src_sel = DI_SRC_SEL_DMA; in fd_draw_emit() 139 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd_draw_emit() 142 fd_draw(batch, ring, primtype, vismode, src_sel, in fd_draw_emit()
|
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_draw.h | 45 enum pc_di_src_sel src_sel, uint32_t count, in fd5_draw() argument 63 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), in fd5_draw() 66 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd5_draw() 90 enum pc_di_src_sel src_sel; in fd5_draw_emit() local 131 src_sel = DI_SRC_SEL_DMA; in fd5_draw_emit() 137 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd5_draw_emit() 140 fd5_draw(batch, ring, primtype, vismode, src_sel, in fd5_draw_emit()
|
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_draw.h | 54 enum pc_di_src_sel src_sel, uint32_t count, in fd4_draw() argument 72 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), in fd4_draw() 75 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd4_draw() 112 enum pc_di_src_sel src_sel; in fd4_draw_emit() local 151 src_sel = DI_SRC_SEL_DMA; in fd4_draw_emit() 157 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd4_draw_emit() 160 fd4_draw(batch, ring, primtype, vismode, src_sel, in fd4_draw_emit()
|
/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_builder.cpp | 554 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_tex() 555 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_tex() 556 .SRC_SEL_Z(bc.src_sel[2]) in build_fetch_tex() 557 .SRC_SEL_W(bc.src_sel[3]); in build_fetch_tex() 579 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_gds() 580 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_gds() 581 .SRC_SEL_Z(bc.src_sel[2]); in build_fetch_gds() 617 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_vtx() 629 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_vtx() 630 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_vtx()
|
D | sb_bc_decoder.cpp | 486 bc.src_sel[0] = w2.get_SRC_SEL_X(); in decode_fetch() 487 bc.src_sel[1] = w2.get_SRC_SEL_Y(); in decode_fetch() 488 bc.src_sel[2] = w2.get_SRC_SEL_Z(); in decode_fetch() 489 bc.src_sel[3] = w2.get_SRC_SEL_W(); in decode_fetch() 509 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_gds() 510 bc.src_sel[1] = w0.get_SRC_SEL_Y(); in decode_fetch_gds() 511 bc.src_sel[2] = w0.get_SRC_SEL_Z(); in decode_fetch_gds() 546 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_vtx() 559 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_vtx()
|
D | sb_bc_finalize.cpp | 537 dst.bc.src_sel[chan] = sel; in copy_fetch_src() 600 unsigned sel = f->bc.src_sel[chan]; in finalize_fetch() 644 f->bc.src_sel[chan] = sel; in finalize_fetch()
|
D | sb_bc_parser.cpp | 684 unsigned sw = n->bc.src_sel[s]; in prepare_fetch_clause() 715 if (n->bc.src_sel[s] <= SEL_W) in prepare_fetch_clause() 717 n->bc.src_sel[s], false); in prepare_fetch_clause()
|
D | sb_bc_dump.cpp | 479 s << chans[n.bc.src_sel[k]]; in dump()
|
D | sb_bc.h | 545 unsigned src_sel[4]; member
|
/external/u-boot/drivers/clk/ |
D | clk_zynqmp.c | 310 u32 src_sel; in zynqmp_clk_get_pll_src() local 313 src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >> in zynqmp_clk_get_pll_src() 316 src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >> in zynqmp_clk_get_pll_src() 319 switch (src_sel) { in zynqmp_clk_get_pll_src()
|
/external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
D | nvc0_query_hw_sm.c | 601 uint32_t src_sel; /* signal selection for up to 4 sources */ member 2370 PUSH_DATA (push, cfg->ctr[i].src_sel + 0x2108421 * (c & 3)); in nve4_hw_sm_begin_query() 2451 PUSH_DATA (push, cfg->ctr[i].src_sel | mask_sel); in nvc0_hw_sm_begin_query()
|
/external/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 40 // src_sel for ALU src operands, see also ALU_CONST, ALU_PARAM registers
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 46 // src_sel for ALU src operands, see also ALU_CONST, ALU_PARAM registers
|