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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Drem.ll14 define i32 @srem() {
15 ; CHECK-LABEL: 'srem'
16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = srem i64 undef, und…
17 ; CHECK-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = srem <2 x i64> u…
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = srem <4 x i64> u…
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = srem <8 x i64> …
20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = srem i32 undef, und…
21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i32 = srem <4 x i32> u…
22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i32 = srem <8 x i32> …
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i32 = srem <16 x i32…
[all …]
/external/llvm/test/Analysis/CostModel/ARM/
Ddivrem.ll229 ; CHECK: cost of 40 {{.*}} srem
231 %1 = srem <2 x i8> %a, %b
236 ; CHECK: cost of 40 {{.*}} srem
238 %1 = srem <2 x i16> %a, %b
243 ; CHECK: cost of 40 {{.*}} srem
245 %1 = srem <2 x i32> %a, %b
250 ; CHECK: cost of 40 {{.*}} srem
252 %1 = srem <2 x i64> %a, %b
257 ; CHECK: cost of 80 {{.*}} srem
259 %1 = srem <4 x i8> %a, %b
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/ARM/
Ddivrem.ll229 ; CHECK: cost of 40 {{.*}} srem
231 %1 = srem <2 x i8> %a, %b
236 ; CHECK: cost of 40 {{.*}} srem
238 %1 = srem <2 x i16> %a, %b
243 ; CHECK: cost of 40 {{.*}} srem
245 %1 = srem <2 x i32> %a, %b
250 ; CHECK: cost of 40 {{.*}} srem
252 %1 = srem <2 x i64> %a, %b
257 ; CHECK: cost of 80 {{.*}} srem
259 %1 = srem <4 x i8> %a, %b
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Drem_crash.ll14 %1 = srem i8 %x, 10
22 %1 = srem i8 %x, 10
46 %1 = srem i16 %x, 10
54 %1 = srem i16 %x, 10
78 %1 = srem i32 %x, 10
86 %1 = srem i32 %x, 10
110 %1 = srem i64 %x, 10
118 %1 = srem i64 %x, 10
142 %1 = srem i8 %x, 10
150 %1 = srem i8 %x, 10
[all …]
/external/llvm/test/CodeGen/X86/
Drem_crash.ll15 %1 = srem i8 %x, 10
23 %1 = srem i8 %x, 10
47 %1 = srem i16 %x, 10
55 %1 = srem i16 %x, 10
79 %1 = srem i32 %x, 10
87 %1 = srem i32 %x, 10
111 %1 = srem i64 %x, 10
119 %1 = srem i64 %x, 10
143 %1 = srem i8 %x, 10
151 %1 = srem i8 %x, 10
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Drem_crash.ll14 %1 = srem i8 %x, 10
22 %1 = srem i8 %x, 10
46 %1 = srem i16 %x, 10
54 %1 = srem i16 %x, 10
78 %1 = srem i32 %x, 10
86 %1 = srem i32 %x, 10
110 %1 = srem i64 %x, 10
118 %1 = srem i64 %x, 10
142 %1 = srem i8 %x, 10
150 %1 = srem i8 %x, 10
[all …]
/external/llvm/test/CodeGen/AArch64/
Drem_crash.ll14 %1 = srem i8 %x, 10
22 %1 = srem i8 %x, 10
46 %1 = srem i16 %x, 10
54 %1 = srem i16 %x, 10
78 %1 = srem i32 %x, 10
86 %1 = srem i32 %x, 10
110 %1 = srem i64 %x, 10
118 %1 = srem i64 %x, 10
142 %1 = srem i8 %x, 10
150 %1 = srem i8 %x, 10
[all …]
/external/llvm/test/CodeGen/ARM/
Drem_crash.ll14 %1 = srem i8 %x, 10
22 %1 = srem i8 %x, 10
46 %1 = srem i16 %x, 10
54 %1 = srem i16 %x, 10
78 %1 = srem i32 %x, 10
86 %1 = srem i32 %x, 10
110 %1 = srem i64 %x, 10
118 %1 = srem i64 %x, 10
142 %1 = srem i8 %x, 10
150 %1 = srem i8 %x, 10
[all …]
Ddivmod-eabi.ll18 %rem = srem i32 %conv, %conv1
26 %rem8 = srem i32 %conv1, %conv
44 %rem = srem i32 %a, %b
52 %rem1 = srem i32 %b, %a
88 %rem = srem i64 %a, %b
108 %rem = srem i16 %a, %b
123 %rem = srem i32 %a, %b
139 %rem = srem i32 %a, %b
150 %rem = srem i32 %a, %b
155 %rem1 = srem i32 %b, %rem
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Drem_crash.ll15 %1 = srem i8 %x, 10
23 %1 = srem i8 %x, 10
47 %1 = srem i16 %x, 10
55 %1 = srem i16 %x, 10
79 %1 = srem i32 %x, 10
87 %1 = srem i32 %x, 10
111 %1 = srem i64 %x, 10
119 %1 = srem i64 %x, 10
143 %1 = srem i8 %x, 10
151 %1 = srem i8 %x, 10
[all …]
Dcombine-srem.ll6 ; fold (srem x, 1) -> 0
12 %1 = srem i32 %x, 1
26 %1 = srem <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
30 ; fold (srem x, -1) -> 0
36 %1 = srem i32 %x, -1
50 %1 = srem <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
54 ; TODO fold (srem x, INT_MIN)
66 %1 = srem i32 %x, -2147483648
99 %1 = srem <4 x i32> %x, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
103 ; TODO fold (srem x, x) -> 0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/
Dsigned-div-rem.ll169 %rem = srem i32 %conv, 129
176 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[CONV]], 128
180 %rem = srem i32 %conv, 128
190 %rem = srem i32 %conv, -129
197 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[CONV]], -128
201 %rem = srem i32 %conv, -128
211 %rem = srem i32 %conv, 256
218 ; CHECK-NEXT: [[REM:%.*]] = srem i32 [[CONV]], 255
222 %rem = srem i32 %conv, 255
232 %rem = srem i32 %conv, -256
[all …]
Dsrem.ll9 %rem = srem i32 %negx, %x
18 %rem = srem <2 x i32> %negx, %x
28 %rem = srem i32 %xy, %yx
38 %rem = srem <2 x i32> %xy, %yx
47 %rem = srem <3 x i32> %negx, %x
54 ; CHECK-NEXT: [[REM:%.*]] = srem <2 x i32> [[NEGX]], [[X]]
58 %rem = srem <2 x i32> %negx, %x
67 %rem = srem i32 %x, %negx
Drem.ll16 %B = srem <2 x i32> zeroinitializer, %A
34 %rem = srem <2 x i8> <i8 1, i8 2>, <i8 0, i8 -42>
50 %rem = srem <2 x i8> %x, <i8 -42, i8 0>
66 %rem = srem <2 x i8> %x, <i8 -42, i8 undef>
86 %rem = srem <2 x i1> %x, %y
112 %r = srem i32 %y, %ext
121 %rem = srem i32 %x, %rhs
136 ; CHECK-NEXT: [[MOD:%.*]] = srem i32 [[X:%.*]], [[N:%.*]]
139 %mod = srem i32 %x, %n
140 %mod1 = srem i32 %mod, %n
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dsrem.ll9 %result = srem i32 %num, %den
16 %result = srem i32 %num, 4
29 %result = srem i32 %num, 7
38 %result = srem <2 x i32> %num, %den
45 %result = srem <2 x i32> %num, <i32 4, i32 4>
54 %result = srem <4 x i32> %num, %den
61 %result = srem <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
70 %result = srem i64 %num, %den
77 %result = srem i64 %num, 4
86 %result = srem <2 x i64> %num, %den
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dsrem.ll9 %result = srem i32 %num, %den
16 %result = srem i32 %num, 4
29 %result = srem i32 %num, 7
38 %result = srem <2 x i32> %num, %den
45 %result = srem <2 x i32> %num, <i32 4, i32 4>
54 %result = srem <4 x i32> %num, %den
61 %result = srem <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
70 %result = srem i64 %num, %den
77 %result = srem i64 %num, 4
86 %result = srem <2 x i64> %num, %den
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Drem.ll7 %B = srem i32 %A, 1 ; ISA constant 0
12 %B = srem i32 0, %A
22 %B = srem i32 %A, -8
41 %B = srem i32 %A, 0 ;; undef
47 %C = srem i32 %B, 4
53 %C = srem i32 %B, 8
81 %tmp.5 = srem i32 %tmp.1, 2
86 %x = srem i32 %i, %i
/external/llvm/test/Transforms/InstSimplify/
Drem.ll9 %rem = srem i32 %x, %rhs
24 ; CHECK: [[MOD:%.*]] = srem i32 %x, %n
27 %mod = srem i32 %x, %n
28 %mod1 = srem i32 %mod, %n
44 ; CHECK: [[MOD:%.*]] = srem i32 %x, %n
48 %mod = srem i32 %x, %n
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/SystemZ/
Dint-arith.ll190 define void @srem() {
191 %res0 = srem i8 undef, undef
192 %res1 = srem i16 undef, undef
193 %res2 = srem i32 undef, undef
194 %res3 = srem i64 undef, undef
195 %res4 = srem <2 x i8> undef, undef
196 %res5 = srem <2 x i16> undef, undef
197 %res6 = srem <2 x i32> undef, undef
198 %res7 = srem <2 x i64> undef, undef
199 %res8 = srem <4 x i8> undef, undef
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IndVarSimplify/
Dreplace-srem-by-urem.ll10 %rem = srem i32 %i.01, 2
11 ; CHECK-NOT: srem
32 %rem = srem i32 %mul, %d
52 %rem = srem i32 2048, %i.01
54 ; CHECK-NOT: srem
74 %rem = srem i32 %mul, 7
76 ; CHECK-NOT: srem
96 %rem = srem i32 %mul, 6
98 ; CHECK-NOT: srem
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/DivRemPairs/X86/
Ddiv-rem-pairs.ll7 ; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
12 %rem = srem i32 %a, %b
37 ; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
48 %rem = srem i32 %a, %b
90 ; Hoist the srem if it's safe and free, otherwise decompose it.
96 ; CHECK-NEXT: [[REM:%.*]] = srem i16 %a, %b
111 %rem = srem i16 %a, %b
153 ; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b
164 %rem = srem i32 %a, %b
186 ; CHECK-NEXT: [[REM2:%.*]] = srem i32 %a, %b
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dint-div-03.ll29 %rem = srem i64 %a, %bext
43 %rem = srem i64 %a, %bext
66 %rem = srem i64 %a, %bext
94 %rem = srem i64 %a, %bext
110 %rem = srem i64 %a, %bext
123 %rem = srem i64 %a, %bext
137 %rem = srem i64 %a, %bext
149 %rem = srem i64 %a, %bext
161 %rem = srem i64 %a, %bext
175 %rem = srem i64 %a, %bext
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dint-div-03.ll29 %rem = srem i64 %a, %bext
43 %rem = srem i64 %a, %bext
66 %rem = srem i64 %a, %bext
94 %rem = srem i64 %a, %bext
110 %rem = srem i64 %a, %bext
123 %rem = srem i64 %a, %bext
137 %rem = srem i64 %a, %bext
149 %rem = srem i64 %a, %bext
161 %rem = srem i64 %a, %bext
175 %rem = srem i64 %a, %bext
[all …]
/external/llvm/test/Transforms/InstCombine/
Drem.ll9 %B = srem i32 %A, 1 ; ISA constant 0
16 %B = srem i32 0, %A
51 %B = srem i32 %A, -8
81 %B = srem i32 %A, 0 ;; undef
89 %C = srem i32 %B, 4
97 %C = srem i32 %B, 8
133 %tmp.5 = srem i32 %tmp.1, 2
140 %x = srem i32 %i, %i
243 ; CHECK-NEXT: %phitmp = srem i32 %v, 5
254 %rem = srem i32 %lhs, 5
[all …]
/external/llvm/test/Transforms/SimplifyCFG/
DPR16069.ll8 ; CHECK: [[COND_I:%.*]] = phi i32 [ srem (i32 1, i32 zext (i1 icmp eq (i32* @b, i32* null) …
17 …%cond.i = phi i32 [ 0, %bb1 ], [ srem (i32 1, i32 zext (i1 icmp eq (i32* @b, i32* null) to i32)), …
23 ; CHECK: [[COND:%.*]] = phi i32 [ 0, %bb1 ], [ srem (i32 1, i32 zext (i1 icmp eq (i32* @b, …
31 …%cond = phi i32 [ 0, %bb1 ], [ srem (i32 1, i32 zext (i1 icmp eq (i32* @b, i32* null) to i32)), %b…

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