/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 333 ssubw v0.8h, v1.8h, v2.8b 334 ssubw v0.4s, v1.4s, v2.4h 335 ssubw v0.2d, v1.2d, v2.2s
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D | neon-diagnostics.s | 2703 ssubw v0.8h, v1.8h, v2.8h 2704 ssubw v0.4s, v1.4s, v2.4s 2705 ssubw v0.2d, v1.2d, v2.2d
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 333 ssubw v0.8h, v1.8h, v2.8b 334 ssubw v0.4s, v1.4s, v2.4h 335 ssubw v0.2d, v1.2d, v2.2s
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D | neon-diagnostics.s | 2652 ssubw v0.8h, v1.8h, v2.8h 2653 ssubw v0.4s, v1.4s, v2.4s 2654 ssubw v0.2d, v1.2d, v2.2d
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/external/capstone/suite/MC/AArch64/ |
D | neon-3vdiff.s.cs | 114 0x20,0x30,0x22,0x0e = ssubw v0.8h, v1.8h, v2.8b 115 0x20,0x30,0x62,0x0e = ssubw v0.4s, v1.4s, v2.4h 116 0x20,0x30,0xa2,0x0e = ssubw v0.2d, v1.2d, v2.2s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-vsub.ll | 283 ;CHECK: ssubw.8h 293 ;CHECK: ssubw.4s 303 ;CHECK: ssubw.2d 313 ;CHECK: ssubw.8h 326 ;CHECK: ssubw.4s 339 ;CHECK: ssubw.2d
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D | arm64-neon-3vdiff.ll | 433 ; CHECK: ssubw {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8b 442 ; CHECK: ssubw {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4h 451 ; CHECK: ssubw {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2s
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/external/libavc/common/armv8/ |
D | ih264_iquant_itrans_recon_av8.s | 674 ssubw v22.4s, v22.4s, v15.4h 683 ssubw v28.4s, v28.4s, v11.4h 687 ssubw v22.4s, v22.4s, v21.4h 696 ssubw v28.4s, v28.4s, v18.4h
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AArch64/ |
D | free-widening-casts.ll | 496 ; CODE: ssubw v0.8h, v1.8h, v0.8b 506 ; CODE: ssubw v0.4s, v1.4s, v0.4h 516 ; CODE: ssubw v0.2d, v1.2d, v0.2s 527 ; CODE-NEXT: ssubw v0.8h, v1.8h, v0.8b 538 ; CODE-NEXT: ssubw v0.4s, v1.4s, v0.4h 549 ; CODE-NEXT: ssubw v0.2d, v1.2d, v0.2s
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/external/libhevc/common/arm64/ |
D | ihevc_deblk_luma_horz.s | 509 ssubw v4.8h, v6.8h , v7.8b 563 ssubw v14.8h, v14.8h , v7.8b
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D | ihevc_deblk_luma_vert.s | 588 ssubw v2.8h, v2.8h , v20.8b
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vsub.ll | 283 ;CHECK: ssubw.8h 293 ;CHECK: ssubw.4s 303 ;CHECK: ssubw.2d
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D | arm64-neon-3vdiff.ll | 433 ; CHECK: ssubw {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8b 442 ; CHECK: ssubw {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4h 451 ; CHECK: ssubw {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1398 # CHECK: ssubw v0.8h, v1.8h, v2.8b 1399 # CHECK: ssubw v0.4s, v1.4s, v2.4h 1400 # CHECK: ssubw v0.2d, v1.2d, v2.2s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1398 # CHECK: ssubw v0.8h, v1.8h, v2.8b 1399 # CHECK: ssubw v0.4s, v1.4s, v2.4h 1400 # CHECK: ssubw v0.2d, v1.2d, v2.2s
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 467 V(ssubw, Ssubw) \
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D | simulator-arm64.h | 1690 LogicVRegister ssubw(VectorFormat vform, LogicVRegister dst,
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D | assembler-arm64.h | 2094 void ssubw(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1554 0x~~~~~~~~~~~~~~~~ 0eba32f9 ssubw v25.2d, v23.2d, v26.2s 1555 0x~~~~~~~~~~~~~~~~ 0e783255 ssubw v21.4s, v18.4s, v24.4h 1556 0x~~~~~~~~~~~~~~~~ 0e2332de ssubw v30.8h, v22.8h, v3.8b
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D | log-disasm | 1554 0x~~~~~~~~~~~~~~~~ 0eba32f9 ssubw v25.2d, v23.2d, v26.2s 1555 0x~~~~~~~~~~~~~~~~ 0e783255 ssubw v21.4s, v18.4s, v24.4h 1556 0x~~~~~~~~~~~~~~~~ 0e2332de ssubw v30.8h, v22.8h, v3.8b
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D | log-cpufeatures-custom | 1553 0x~~~~~~~~~~~~~~~~ 0eba32f9 ssubw v25.2d, v23.2d, v26.2s ### {NEON} ### 1554 0x~~~~~~~~~~~~~~~~ 0e783255 ssubw v21.4s, v18.4s, v24.4h ### {NEON} ### 1555 0x~~~~~~~~~~~~~~~~ 0e2332de ssubw v30.8h, v22.8h, v3.8b ### {NEON} ###
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D | log-cpufeatures | 1553 0x~~~~~~~~~~~~~~~~ 0eba32f9 ssubw v25.2d, v23.2d, v26.2s // Needs: NEON 1554 0x~~~~~~~~~~~~~~~~ 0e783255 ssubw v21.4s, v18.4s, v24.4h // Needs: NEON 1555 0x~~~~~~~~~~~~~~~~ 0e2332de ssubw v30.8h, v22.8h, v3.8b // Needs: NEON
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1787 __ ssubw(v25.V2D(), v23.V2D(), v26.V2S()); in GenerateTestSequenceNEON() local 1788 __ ssubw(v21.V4S(), v18.V4S(), v24.V4H()); in GenerateTestSequenceNEON() local 1789 __ ssubw(v30.V8H(), v22.V8H(), v3.V8B()); in GenerateTestSequenceNEON() local
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2454 LogicVRegister ssubw(VectorFormat vform,
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D | assembler-aarch64.h | 3090 void ssubw(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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