| /external/pcre/dist2/src/ |
| D | pcre2_dfa_match.c | 738 int state_offset = current_state->offset; in internal_dfa_match() local
747 if (state_offset < 0) in internal_dfa_match()
751 ADD_NEW_DATA(state_offset, current_state->count, in internal_dfa_match()
758 current_state->offset = state_offset = -state_offset; in internal_dfa_match()
768 if (active_states[j].offset == state_offset && in internal_dfa_match()
775 code = start_code + state_offset; in internal_dfa_match()
861 ADD_ACTIVE(state_offset + 1 + LINK_SIZE, 0); in internal_dfa_match()
864 ADD_ACTIVE(state_offset - (int)GET(code, 1), 0); in internal_dfa_match()
926 ADD_ACTIVE(state_offset + 1, 0); in internal_dfa_match()
942 { ADD_ACTIVE(state_offset + 1, 0); } in internal_dfa_match()
[all …]
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| /external/boringssl/src/crypto/test/asm/ |
| D | trampoline-x86_64.pl | 166 my $state_offset = $func_offset + 8;
172 $scratch_offset = $state_offset + 8;
174 $unwind_offset = $state_offset + 8;
208 movq $state, $state_offset(%rsp)
281 movq $state_offset(%rsp), $state
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_blorp_exec.c | 100 uint32_t state_offset; in blorp_alloc_binding_table() local
105 &state_offset, &bt_state); in blorp_alloc_binding_table()
115 bt_map[i] = surface_state.offset + state_offset; in blorp_alloc_binding_table()
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| D | anv_blorp.c | 897 uint32_t *state_offset, in anv_cmd_buffer_alloc_blorp_binding_table() argument
901 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
914 state_offset); in anv_cmd_buffer_alloc_blorp_binding_table()
926 uint32_t state_offset; in binding_table_for_surface_state() local
930 anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, 1, &state_offset, in binding_table_for_surface_state()
936 bt_map[0] = surface_state.offset + state_offset; in binding_table_for_surface_state()
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| D | genX_cmd_buffer.c | 1555 uint32_t bias, state_offset; in emit_binding_table() local
1582 &state_offset); in emit_binding_table()
1602 bt_map[0] = surface_state.offset + state_offset; in emit_binding_table()
1647 bt_map[bias + s] = surface_state.offset + state_offset; in emit_binding_table()
1769 bt_map[bias + s] = surface_state.offset + state_offset; in emit_binding_table()
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| D | anv_batch_chain.c | 620 uint32_t entries, uint32_t *state_offset) in anv_cmd_buffer_alloc_binding_table() argument
637 *state_offset = -bt_block->offset; in anv_cmd_buffer_alloc_binding_table()
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| D | anv_private.h | 1878 uint32_t entries, uint32_t *state_offset);
1915 uint32_t *state_offset,
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_misc_state.c | 68 OUT_RELOC(brw->batch.state.bo, 0, brw->vs.base.state_offset); in upload_pipelined_state_pointers()
70 OUT_RELOC(brw->batch.state.bo, 0, brw->ff_gs.state_offset | 1); in upload_pipelined_state_pointers()
73 OUT_RELOC(brw->batch.state.bo, 0, brw->clip.state_offset | 1); in upload_pipelined_state_pointers()
74 OUT_RELOC(brw->batch.state.bo, 0, brw->sf.state_offset); in upload_pipelined_state_pointers()
75 OUT_RELOC(brw->batch.state.bo, 0, brw->wm.base.state_offset); in upload_pipelined_state_pointers()
76 OUT_RELOC(brw->batch.state.bo, 0, brw->cc.state_offset); in upload_pipelined_state_pointers()
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| D | brw_context.h | 637 uint32_t state_offset; member
1087 uint32_t state_offset; member
1105 uint32_t state_offset; member
1126 uint32_t state_offset; member
1147 uint32_t state_offset; member
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| D | intel_batchbuffer.c | 765 OUT_BATCH(brw->cc.state_offset | 1); in brw_finish_batch()
1111 brw_state_reloc(struct intel_batchbuffer *batch, uint32_t state_offset, in brw_state_reloc() argument
1115 assert(state_offset <= batch->state.bo->size - sizeof(uint32_t)); in brw_state_reloc()
1117 return emit_reloc(batch, &batch->state_relocs, state_offset, in brw_state_reloc()
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| D | genX_state_upload.c | 1263 brw_state_emit(brw, GENX(CLIP_STATE), 32, &brw->clip.state_offset, clip) { in genX()
1503 brw_state_emit(brw, GENX(SF_STATE), 64, &brw->sf.state_offset, sf) {
1807 brw_state_emit(brw, GENX(WM_STATE), 64, &stage_state->state_offset, wm) {
2096 brw_state_emit(brw, GENX(VS_STATE), 32, &stage_state->state_offset, vs) {
2598 brw_state_emit(brw, GENX(GS_STATE), 32, &brw->ff_gs.state_offset, gs) {
3337 brw_state_emit(brw, GENX(COLOR_CALC_STATE), 64, &brw->cc.state_offset, cc) {
3379 ptr.ColorCalcStatePointer = brw->cc.state_offset;
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| /external/mesa3d/src/intel/tools/ |
| D | gen_batch_decoder.c | 593 uint32_t state_offset; in decode_dynamic_state_pointers() local
599 state_offset = iter.raw_value; in decode_dynamic_state_pointers()
604 uint32_t state_addr = ctx->dynamic_base.addr + state_offset; in decode_dynamic_state_pointers()
605 const uint32_t *state_map = ctx->dynamic_base.map + state_offset; in decode_dynamic_state_pointers()
608 ctx_print_group(ctx, state, state_offset, state_map); in decode_dynamic_state_pointers()
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| /external/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 1249 void *state, uint32_t state_offset, in blorp_emit_surface_state() argument
1286 blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, in blorp_emit_surface_state()
1296 blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, in blorp_emit_surface_state()
1307 dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset; in blorp_emit_surface_state()
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| /external/u-boot/lib/ |
| D | tpm-v1.c | 309 const size_t state_offset = 10; in tpm_physical_set_deactivated() local
314 state_offset, state)) in tpm_physical_set_deactivated()
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 3445 const uword state_offset = ClassHeapStats::state_offset(); in MaybeTraceAllocation() local
3446 ldr(temp_reg, Address(temp_reg, state_offset)); in MaybeTraceAllocation()
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