/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | fast-isel-atomic.ll | 85 ; CHECK-NEXT: stlrb w1, [x0] 95 ; CHECK-NEXT: stlrb w1, [x0] 166 ; CHECK-NEXT: stlrb w1, [x0] 176 ; CHECK-NEXT: stlrb w1, [x0]
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D | atomic-ops.ll | 1094 ; CHECK: stlrb w0, [x[[ADDR]]] 1107 ; CHECK: stlrb w0, [x[[ADDR]]]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 498 stlrb w3, [x6] 503 ; CHECK: stlrb w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x08]
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D | basic-a64-instructions.s | 2296 stlrb w27, [sp]
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 498 stlrb w3, [x6] 503 ; CHECK: stlrb w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x08]
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D | basic-a64-instructions.s | 2313 stlrb w27, [sp]
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/external/vixl/ |
D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 484 # CHECK: stlrb w3, [x6]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 484 # CHECK: stlrb w3, [x6]
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/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 1095 ; CHECK: stlrb w0, [x[[ADDR]]] 1108 ; CHECK: stlrb w0, [x[[ADDR]]]
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 92 V(Stlrb, stlrb) \
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D | assembler-arm64.h | 1656 void stlrb(const Register& rt, const Register& rn);
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D | assembler-arm64.cc | 1778 void Assembler::stlrb(const Register& rt, const Register& rn) { in stlrb() function in v8::internal::Assembler
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 1936 COMPARE(stlrb(w20, MemOperand(x21)), "stlrb w20, [x21]"); in TEST() 1937 COMPARE(stlrb(w22, MemOperand(sp)), "stlrb w22, [sp]"); in TEST() 1938 COMPARE(stlrb(x23, MemOperand(x24)), "stlrb w23, [x24]"); in TEST() 1939 COMPARE(stlrb(x25, MemOperand(sp)), "stlrb w25, [sp]"); in TEST()
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D | test-trace-aarch64.cc | 291 __ stlrb(w20, MemOperand(x0)); in GenerateTestSequenceBase() local 292 __ stlrb(x21, MemOperand(x0)); in GenerateTestSequenceBase() local
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 900 0xfb,0xff,0x9f,0x08 = stlrb w27, [sp]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1373 void stlrb(const Register& rt, const MemOperand& dst);
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D | macro-assembler-aarch64.h | 2228 stlrb(rt, dst); in Stlrb()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 239 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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D | log-disasm | 238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 239 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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D | log-cpufeatures-custom | 238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 239 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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D | log-cpufeatures | 238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 239 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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D | log-cpufeatures-colour | 238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 239 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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D | log-all | 586 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0] 588 0x~~~~~~~~~~~~~~~~ 089ffc15 stlrb w21, [x0]
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1072 void stlrb(const Register& rt, const MemOperand& dst)
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