/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 107 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 347 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 426 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] 508 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 703 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 894 ; CHECK: stxrb [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 97 ; CHECK: stxrb w0, w1, [x2]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 107 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 347 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 426 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] 507 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 702 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 893 ; CHECK: stxrb [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 97 ; CHECK: stxrb w0, w1, [x2]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 470 stxrb w1, w4, [x3] 477 ; CHECK: stxrb w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x08]
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D | arm64-diags.s | 252 stxrb w3, w5, [x3] 263 ; CHECK-ERRORS: stxrb w3, w5, [x3]
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D | basic-a64-diagnostics.s | 1882 stxrb w2, w3, [x4, #20]
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D | basic-a64-instructions.s | 2240 stxrb w1, w2, [x3, #0]
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 470 stxrb w1, w4, [x3] 477 ; CHECK: stxrb w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x08]
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D | basic-a64-diagnostics.s | 1859 stxrb w2, w3, [x4, #20]
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D | basic-a64-instructions.s | 2257 stxrb w1, w2, [x3, #0]
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/external/vixl/ |
D | README.md | 124 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 458 # CHECK: stxrb w1, w4, [x3]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 458 # CHECK: stxrb w1, w4, [x3]
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 1872 COMPARE(stxrb(w0, w1, MemOperand(x2)), "stxrb w0, w1, [x2]"); in TEST() 1873 COMPARE(stxrb(x3, w4, MemOperand(sp)), "stxrb w3, w4, [sp]"); in TEST() 1874 COMPARE(stxrb(w5, x6, MemOperand(x7)), "stxrb w5, w6, [x7]"); in TEST() 1875 COMPARE(stxrb(x8, x9, MemOperand(sp)), "stxrb w8, w9, [sp]"); in TEST()
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D | test-trace-aarch64.cc | 339 __ stxrb(w16, w17, MemOperand(x0)); in GenerateTestSequenceBase() local 340 __ stxrb(x18, x19, MemOperand(x0)); in GenerateTestSequenceBase() local
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 876 0x62,0x7c,0x01,0x08 = stxrb w1, w2, [x3]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1319 void stxrb(const Register& rs, const Register& rt, const MemOperand& dst);
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D | macro-assembler-aarch64.h | 2312 stxrb(rs, rt, dst); in Stxrb()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 286 0x~~~~~~~~~~~~~~~~ 08107c11 stxrb w16, w17, [x0] 287 0x~~~~~~~~~~~~~~~~ 08127c13 stxrb w18, w19, [x0]
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D | log-disasm | 286 0x~~~~~~~~~~~~~~~~ 08107c11 stxrb w16, w17, [x0] 287 0x~~~~~~~~~~~~~~~~ 08127c13 stxrb w18, w19, [x0]
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D | log-cpufeatures-custom | 286 0x~~~~~~~~~~~~~~~~ 08107c11 stxrb w16, w17, [x0] 287 0x~~~~~~~~~~~~~~~~ 08127c13 stxrb w18, w19, [x0]
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D | log-cpufeatures | 286 0x~~~~~~~~~~~~~~~~ 08107c11 stxrb w16, w17, [x0] 287 0x~~~~~~~~~~~~~~~~ 08127c13 stxrb w18, w19, [x0]
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D | log-cpufeatures-colour | 286 0x~~~~~~~~~~~~~~~~ 08107c11 stxrb w16, w17, [x0] 287 0x~~~~~~~~~~~~~~~~ 08127c13 stxrb w18, w19, [x0]
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1206 void stxrb(const Register& rs, const Register& rt, const MemOperand& dst)
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