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Searched refs:subslice_total (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_screen.h110 int subslice_total; member
Dintel_screen.c1750 screen->subslice_total = -1; in intel_detect_sseu()
1754 &screen->subslice_total); in intel_detect_sseu()
1767 if (screen->subslice_total < 1 || screen->eu_total < 1) in intel_detect_sseu()
1774 screen->subslice_total = -1; in intel_detect_sseu()
2499 screen->subslice_total = 1 << (devinfo->gt - 1); in intelInitScreen2()
Dbrw_context.c726 screen->subslice_total > 0 && screen->eu_total > 0) { in brw_initialize_cs_context_constants()
728 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7; in brw_initialize_cs_context_constants()
Dbrw_program.c387 unsigned subslices = MAX2(brw->screen->subslice_total, 1); in brw_alloc_stage_scratch()
DgenX_state_upload.c4235 const uint32_t subslices = MAX2(brw->screen->subslice_total, 1);
/external/mesa3d/src/intel/vulkan/
Danv_device.c386 device->subslice_total = anv_gem_get_param(fd, I915_PARAM_SUBSLICE_TOTAL); in anv_physical_device_init()
393 if (device->subslice_total < 1 || device->eu_total < 1) { in anv_physical_device_init()
397 device->subslice_total = 1 << (device->info.gt - 1); in anv_physical_device_init()
401 device->subslice_total > 0 && device->eu_total > 0) { in anv_physical_device_init()
404 device->eu_total / device->subslice_total * device->info.num_thread_per_eu; in anv_physical_device_init()
Danv_allocator.c1100 const unsigned subslices = MAX2(physical_device->subslice_total, 1); in anv_scratch_pool_alloc()
DgenX_pipeline.c1810 const uint32_t subslices = MAX2(physical_device->subslice_total, 1);
Danv_private.h776 uint32_t subslice_total; member
/external/libdrm/intel/
Dintel_bufmgr.h290 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
Dintel_bufmgr_gem.c3333 drm_intel_get_subslice_total(int fd, unsigned int *subslice_total) in drm_intel_get_subslice_total() argument
3339 gp.value = (int*)subslice_total; in drm_intel_get_subslice_total()