| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | sub.ll | 40 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
43 ; MM: subu16 $2, $[[T1]], $[[T0]]
60 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
78 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
91 ; MM: subu16 $2, $4, $5
107 ; MM32: subu16 $3, $4, $6
108 ; MM32: subu16 $2, $3, $[[T0]]
109 ; MM32: subu16 $3, $5, $7
150 ; MMR3: subu16 $[[T8:[0-9]+]], $5, $[[T7]]
151 ; MMR3: subu16 $[[T9:[0-9]+]], $[[T8]], $[[T6]]
[all …]
|
| D | srem.ll | 54 ; MMR3: subu16 $2, $[[T1]], $[[T0]]
60 ; MMR6: subu16 $2, $[[T1]], $[[T0]]
|
| D | sdiv.ll | 56 ; MMR3: subu16 $2, $[[T1]], $[[T0]]
62 ; MMR6: subu16 $2, $[[T1]], $[[T0]]
|
| D | urem.ll | 59 ; MMR3: subu16 $2, $[[T1]], $[[T0]]
66 ; MMR6: subu16 $2, $[[T3]], $[[T2]]
|
| D | add.ll | 52 ; MMR6: subu16 $[[T0]], $[[T1]], $[[T0]]
382 ; MMR6: subu16 $2, $[[T1]], $[[T0]]
|
| D | mul.ll | 63 ; MM32: subu16 $2, $[[T1]], $[[T0]]
|
| D | ashr.ll | 811 ; MMR3-NEXT: subu16 $7, $2, $16
887 ; MMR6-NEXT: subu16 $7, $2, $3
|
| D | lshr.ll | 829 ; MMR3-NEXT: subu16 $7, $2, $16
934 ; MMR6-NEXT: subu16 $2, $17, $3
|
| D | shl.ll | 859 ; MMR3-NEXT: subu16 $6, $2, $16
953 ; MMR6-NEXT: subu16 $17, $17, $3
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | sub.ll | 42 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
61 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
79 ; MM: subu16 $[[T0:[0-9]+]], $4, $5
92 ; MM: subu16 $2, $4, $5
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-16-bit-instructions.s | 13 # CHECK-EL: subu16 $5, $16, $3 # encoding: [0xb1,0x06]
68 # CHECK-EB: subu16 $5, $16, $3 # encoding: [0x06,0xb1]
121 subu16 $5, $16, $3
|
| D | micromips-invalid.s | 9 subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | micromips-16-bit-instructions.s | 13 # CHECK-EL: subu16 $5, $16, $3 # encoding: [0xb1,0x06]
68 # CHECK-EB: subu16 $5, $16, $3 # encoding: [0x06,0xb1]
121 subu16 $5, $16, $3
|
| D | micromips-invalid.s | 9 subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | micromips-subu16.ll | 18 ; CHECK: subu16
|
| D | rotate.ll | 11 ; MM32: subu16 $2, $2, $5
|
| /external/llvm/test/CodeGen/Mips/ |
| D | micromips-subu16.ll | 18 ; CHECK: subu16
|
| D | rotate.ll | 11 ; MM32: subu16 $2, $2, $5
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/ |
| D | valid.s | 20 subu16 $5, $16, $3 # CHECK: subu16 $5, $16, $3 # encoding: [0x06,0xb1] label
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| D | valid.s | 149 subu16 $5, $16, $3 # CHECK: subu16 $5, $16, $3 # encoding: [0x04,0x3b]
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 271 subu16 $5, $16, $3 # CHECK: subu16 $5, $16, $3 # encoding: [0x04,0x3b]
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| D | valid-el.txt | 12 0xb1 0x06 # CHECK: subu16 $5, $16, $3
|
| D | valid.txt | 12 0x06 0xb1 # CHECK: subu16 $5, $16, $3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 314 subu16 $5, $16, $3 # CHECK: subu16 $5, $16, $3 # encoding: [0x04,0x3b]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| D | valid-el.txt | 12 0xb1 0x06 # CHECK: subu16 $5, $16, $3
|