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Searched refs:surf_info (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c40 static int radv_amdgpu_surface_sanity(const struct ac_surf_info *surf_info, in radv_amdgpu_surface_sanity() argument
50 if (surf_info->height > 1) in radv_amdgpu_surface_sanity()
55 if (surf_info->depth > 1 || surf_info->array_size > 1) in radv_amdgpu_surface_sanity()
59 if (surf_info->array_size > 1) in radv_amdgpu_surface_sanity()
63 if (surf_info->height > 1) in radv_amdgpu_surface_sanity()
67 if (surf_info->depth > 1) in radv_amdgpu_surface_sanity()
77 const struct ac_surf_info *surf_info, in radv_amdgpu_winsys_surface_init() argument
84 r = radv_amdgpu_surface_sanity(surf_info, surf); in radv_amdgpu_winsys_surface_init()
93 memcpy(&config.info, surf_info, sizeof(config.info)); in radv_amdgpu_winsys_surface_init()
/external/u-boot/drivers/video/
Dati_radeon_fb.c373 mode->surf_info[0] = NONSURF_AP0_SWP_32BPP | NONSURF_AP1_SWP_32BPP; in radeon_setmode_9200()
380 mode->surf_info[0] = NONSURF_AP0_SWP_16BPP | NONSURF_AP1_SWP_16BPP; in radeon_setmode_9200()
408 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1280 * 4 / 16); in radeon_setmode_9200()
412 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1280 * 2 / 16); in radeon_setmode_9200()
416 mode->surf_info[0] = R200_SURF_TILE_COLOR_MACRO | (1280 * 1 / 16); in radeon_setmode_9200()
439 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1024 * 4 / 16); in radeon_setmode_9200()
443 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (1024 * 2 / 16); in radeon_setmode_9200()
447 mode->surf_info[0] = R200_SURF_TILE_COLOR_MACRO | (1024 * 1 / 16); in radeon_setmode_9200()
468 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (832 * 4 / 16); in radeon_setmode_9200()
473 mode->surf_info[0] |= R200_SURF_TILE_COLOR_MACRO | (896 * 2 / 16); in radeon_setmode_9200()
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Dati_radeon_fb.h172 u32 surf_info[8]; member
/external/mesa3d/src/intel/isl/
Disl.c1222 isl_calc_row_pitch_alignment(const struct isl_surf_init_info *surf_info, in isl_calc_row_pitch_alignment() argument
1242 const struct isl_format_layout *fmtl = isl_format_get_layout(surf_info->format); in isl_calc_row_pitch_alignment()
1245 if (surf_info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) { in isl_calc_row_pitch_alignment()
1246 if (isl_format_is_yuv(surf_info->format)) { in isl_calc_row_pitch_alignment()
1270 const struct isl_surf_init_info *surf_info, in isl_calc_tiled_min_row_pitch() argument
1275 const struct isl_format_layout *fmtl = isl_format_get_layout(surf_info->format); in isl_calc_tiled_min_row_pitch()
1290 const struct isl_surf_init_info *surf_info, in isl_calc_min_row_pitch() argument
1296 return isl_calc_linear_min_row_pitch(dev, surf_info, phys_total_el, in isl_calc_min_row_pitch()
1299 return isl_calc_tiled_min_row_pitch(dev, surf_info, tile_info, in isl_calc_min_row_pitch()
1322 const struct isl_surf_init_info *surf_info, in isl_calc_row_pitch() argument
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/external/mesa3d/src/amd/vulkan/
Dradv_radeon_winsys.h257 const struct ac_surf_info *surf_info,