/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | obsolete-v8.s | 6 swpb r0, r1, [r2] label
|
D | thumb2-diagnostics.s | 143 swpb r3, r4, [r5]
|
D | basic-arm-instructions.s | 3021 swpb r5, r1, [r9] 3025 @ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
|
/external/llvm/test/MC/ARM/ |
D | obsolete-v8.s | 6 swpb r0, r1, [r2] label
|
D | basic-arm-instructions.s | 3019 swpb r5, r1, [r9] 3023 @ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | armv8.1a-atomic.s | 130 swpb w0, w1, [x2]
|
D | armv8.1a-lse.s | 94 swpb w0, w1, [x2] 95 swpb w2, w3, [sp] 1385 swpb b0, b1, [x2] 1390 swpb b2, b3, [sp] 1510 swpb v0.4h, v1.4h, v2.4h
|
/external/llvm/test/MC/AArch64/ |
D | armv8.1a-atomic.s | 130 swpb w0, w1, [x2]
|
/external/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.1a-atomic.txt | 42 # CHECK: swpb w0, w1, [x2]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.1a-atomic.txt | 42 # CHECK: swpb w0, w1, [x2]
|
/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 846 0x91,0x50,0x49,0xe1 = swpb r5, r1, [r9]
|
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2137 swpb r5, r1, [r9] 2141 @ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
|
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 990 "swpb\t$dst",
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 998 "swpb\t$dst",
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 990 "swpb\t$dst",
|
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1870 # CHECK: swpb r5, r1, [r9
|
/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1997 void swpb(const Register& rs, const Register& rt, const MemOperand& src);
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2035 # CHECK: swpb r5, r1, [r9
|
/external/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2035 # CHECK: swpb r5, r1, [r9
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrInfo.td | 4207 "swpb", []>;
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | atomic-ops-lse.ll | 3821 ; CHECK: swpb w[[OLD:[0-9]+]], w[[NEW:[0-9]+]], [x[[ADDR]]]
|
/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 4804 (ins GPRnopc:$Rt2, addr_offset_none:$addr), "swpb", []>,
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 5070 (ins GPRnopc:$Rt2, addr_offset_none:$addr), "swpb", []>,
|
/external/vixl/test/aarch64/ |
D | test-cpu-features-aarch64.cc | 3049 TEST_ATOMICS(swpb_0, swpb(w0, w1, MemOperand(x2)))
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 7763 "strh\005strht\004strt\003sub\004subs\004subw\003svc\003swp\004swpb\005s" 8964 …{ 1452 /* swpb */, ARM::SWPB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM|…
|