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/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dcpu_init.c213 clrsetbits_be32(&im->sysconf.spcr, spcr_mask, spcr_val); in cpu_init_f()
239 setbits_be32(&im->sysconf.spcr, SPCR_TBEN); in cpu_init_f()
245 __raw_writel((im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH, in cpu_init_f()
246 &im->sysconf.sicrh); in cpu_init_f()
248 __raw_writel(CONFIG_SYS_SICRH, &im->sysconf.sicrh); in cpu_init_f()
252 __raw_writel(CONFIG_SYS_SICRL, &im->sysconf.sicrl); in cpu_init_f()
255 __raw_writel(CONFIG_SYS_GPR1, &im->sysconf.gpr1); in cpu_init_f()
258 __raw_writel(CONFIG_SYS_DDRCDR, &im->sysconf.ddrcdr); in cpu_init_f()
261 __raw_writel(CONFIG_SYS_OBIR, &im->sysconf.obir); in cpu_init_f()
273 im->sysconf.lblaw[0].bar = CONFIG_SYS_LBLAWBAR0_PRELIM; in cpu_init_f()
[all …]
Dspl_minimal.c41 im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | in cpu_init_f()
46 im->sysconf.spcr |= SPCR_TBEN; in cpu_init_f()
50 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR; in cpu_init_f()
54 im->sysconf.obir = CONFIG_SYS_OBIR; in cpu_init_f()
72 im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM; in cpu_init_f()
73 im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM; in cpu_init_f()
/external/u-boot/board/freescale/mpc837xerdb/
Dpci.c65 volatile sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
67 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; in pci_init_board()
68 volatile law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
71 u32 spridr = in_be32(&immr->sysconf.spridr); in pci_init_board()
95 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
96 out_be32(&sysconf->pecr2, 0xE0008000); in pci_init_board()
Dmpc837xerdb.c69 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
98 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
99 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
101 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
139 u32 spridr = in_be32(&immr->sysconf.spridr); in board_early_init_f()
181 clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); in board_mmc_init()
182 clrsetbits_be32(&im->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD); in board_mmc_init()
/external/u-boot/board/freescale/mpc8308rdb/
Dmpc8308rdb.c107 sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
108 law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
115 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
133 sysconf83xx_t *sysconf = &immr->sysconf; in misc_init_r() local
142 clrsetbits_be32(&sysconf->sicrh, SICRH_GPIO_A_TSEC2, SICRH_GPIO_A_GPIO); in misc_init_r()
Dsdram.c35 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
37 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
38 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
72 if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
/external/u-boot/board/freescale/mpc837xemds/
Dpci.c79 volatile sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
81 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; in pci_init_board()
82 volatile law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
85 u32 spridr = in_be32(&immr->sysconf.spridr); in pci_init_board()
122 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
124 out_be32(&sysconf->pecr2, 0xE0008000); in pci_init_board()
Dmpc837xemds.c35 u32 spridr = in_be32(&immr->sysconf.spridr); in board_early_init_f()
75 clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); in board_mmc_init()
76 clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI, in board_mmc_init()
225 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
255 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
256 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
261 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
/external/u-boot/board/freescale/mpc8315erdb/
Dmpc8315erdb.c120 volatile sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
122 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; in pci_init_board()
123 volatile law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
146 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
147 out_be32(&sysconf->pecr2, 0xE0008000); in pci_init_board()
Dsdram.c47 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
48 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
49 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
99 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
/external/u-boot/board/mpc8308_p1m/
Dmpc8308_p1m.c43 sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
44 law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
51 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
Dsdram.c31 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
33 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
34 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
68 if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
/external/u-boot/board/freescale/mpc8349itx/
Dmpc8349itx.c35 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
37 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
56 debug("DDR:bar=0x%08x\n", im->sysconf.ddrlaw[0].bar); in fixed_sdram()
57 debug("DDR:ar=0x%08x\n", im->sysconf.ddrlaw[0].ar); in fixed_sdram()
128 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
132 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
/external/webrtc/webrtc/base/
Dsysteminfo.cc70 number_of_cores = static_cast<int>(sysconf(_SC_NPROCESSORS_ONLN)); in DetectNumberOfCores()
183 memory = static_cast<int64_t>(sysconf(_SC_PHYS_PAGES)) * in GetMemorySize()
184 static_cast<int64_t>(sysconf(_SC_PAGESIZE)); in GetMemorySize()
187 << "sysconf(_SC_PHYS_PAGES) " << sysconf(_SC_PHYS_PAGES) in GetMemorySize()
188 << "sysconf(_SC_PAGESIZE) " << sysconf(_SC_PAGESIZE); in GetMemorySize()
/external/u-boot/board/gdsys/mpc8308/
Dsdram.c36 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
38 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); in fixed_sdram()
39 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
73 if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
Dstrider.c356 sysconf83xx_t *sysconf = &immr->sysconf; in board_mmc_init() local
359 out_be32(&sysconf->sdhccr, 0x02000000); in board_mmc_init()
383 sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
384 law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
391 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
Dhrcon.c301 sysconf83xx_t *sysconf = &immr->sysconf; in board_mmc_init() local
304 out_be32(&sysconf->sdhccr, 0x02000000); in board_mmc_init()
328 sysconf83xx_t *sysconf = &immr->sysconf; in pci_init_board() local
329 law83xx_t *pcie_law = sysconf->pcielaw; in pci_init_board()
336 out_be32(&sysconf->pecr1, 0xE0008000); in pci_init_board()
/external/ltp/testcases/open_posix_testsuite/conformance/interfaces/fork/
D16-1.c82 ret = ftruncate(fd_s, sysconf(_SC_PAGESIZE)); in main()
88 ret = ftruncate(fd_ns, sysconf(_SC_PAGESIZE)); in main()
96 mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ | PROT_WRITE, in main()
104 mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ | PROT_WRITE, in main()
D8-1.c81 } while ((cur_time - st_time) < sysconf(_SC_CLK_TCK)); in main()
90 sysconf(_SC_CLK_TCK)); in main()
108 sysconf(_SC_CLK_TCK)) in main()
/external/v8/src/base/
Dsys-info.cc43 long result = sysconf(_SC_NPROCESSORS_ONLN); // NOLINT(runtime/int) in NumberOfProcessors()
91 int64_t result = sysconf(_SC_AIX_REALMEM); in AmountOfPhysicalMemory()
94 long pages = sysconf(_SC_PHYS_PAGES); // NOLINT(runtime/int) in AmountOfPhysicalMemory()
95 long page_size = sysconf(_SC_PAGESIZE); // NOLINT(runtime/int) in AmountOfPhysicalMemory()
/external/u-boot/board/freescale/mpc8313erdb/
Dsdram.c50 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
51 im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); in fixed_sdram()
52 im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE; in fixed_sdram()
105 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
/external/u-boot/board/ve8313/
Dve8313.c40 out_be32(&im->sysconf.ddrlaw[0].bar, in fixed_sdram()
42 out_be32(&im->sysconf.ddrlaw[0].ar, (LBLAWAR_EN | (msize_log2 - 1))); in fixed_sdram()
43 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); in fixed_sdram()
96 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
176 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; in pci_init_board()
/external/u-boot/drivers/pinctrl/
Dpinctrl-sti.c59 unsigned long sysconf, *sysconfreg; in sti_alternate_select() local
84 sysconf = readl(sysconfreg); in sti_alternate_select()
85 sysconf = bitfield_replace(sysconf, pin * 4, 3, alt); in sti_alternate_select()
86 writel(sysconf, sysconfreg); in sti_alternate_select()
/external/u-boot/board/sbc8349/
Dsbc8349.c44 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
83 im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); in fixed_sdram()
/external/u-boot/board/freescale/mpc8323erdb/
Dmpc8323erdb.c78 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) in dram_init()
82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
109 im->sysconf.ddrlaw[0].ar = in fixed_sdram()
162 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; in pci_init_board()

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