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Searched refs:tRCD (Results 1 – 12 of 12) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap4/
Demif.c27 .tRCD = 18,
51 .tRCD = 18,
80 .tRCD = 3,
Dsdram_elpida.c194 .tRCD = 18,
217 .tRCD = 18,
240 .tRCD = 18,
262 .tRCD = 3,
/external/u-boot/arch/arm/mach-omap2/omap5/
Demif.c28 .tRCD = 18,
57 .tRCD = 3,
Dsdram.c616 .tRCD = 18,
638 .tRCD = 3,
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c126 u32 tRCD; /* in ps */ member
377 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init() local
548 writel((MCTL_DIV2(tRCD) << 24) | (MCTL_DIV2(tCCD) << 16) | in mctl_channel_init()
642 (tRCD << 12) | (tRP << 8) | (tWTR << 4) | (tRTP << 0), in mctl_channel_init()
888 .tRCD = 13750, in sunxi_dram_init()
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.cfg81 /* tRCD=6+1,tRP=6+1,tRC=0x1a+1,tRAS=0x13+1,tRPA=tRP+1,tWR=7+1,tMRD=0xb+1,tCWL=4+2 */
/external/u-boot/arch/arm/include/asm/
Demif.h1143 u8 tRCD; member
1172 u32 tRCD; member
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip,rk3288-dmc.txt50 rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet
/external/u-boot/board/buffalo/lsxl/
Dkwbimage-lsxhl.cfg56 # bit7-4: 4, 5 cycle tRCD
Dkwbimage-lschl.cfg56 # bit7-4: 4, 5 cycle tRCD
/external/u-boot/board/d-link/dns325/
Dkwbimage.cfg53 # bit7-4: 5, 6 cycle tRCD
/external/u-boot/arch/arm/mach-omap2/
Demif-common.c707 val = max(min_tck->tRCD, ns_2_cycles(timings->tRCD)) - 1; in get_sdram_tim_1_reg()