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Searched refs:tRRD (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap4/
Demif.c30 .tRRD = 10,
54 .tRRD = 10,
83 .tRRD = 2,
Dsdram_elpida.c197 .tRRD = 10,
220 .tRRD = 10,
243 .tRRD = 10,
265 .tRRD = 2,
/external/u-boot/arch/arm/mach-omap2/omap5/
Demif.c31 .tRRD = 10,
60 .tRRD = 2,
Dsdram.c619 .tRRD = 10,
641 .tRRD = 2,
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c130 struct dram_sun9i_timing tRRD; member
390 const u32 tRRD = MAX(para->tRRD.ck, PS2CYCLES_ROUNDUP(para->tRRD.ps)); in mctl_channel_init() local
549 (MCTL_DIV2(tRRD) << 8) | (MCTL_DIV2(tRP) << 0), in mctl_channel_init()
641 writel((tRC << 26) | (tRRD << 22) | (tRAS << 16) | in mctl_channel_init()
900 .tRRD = { .ck = 4, .ps = 7500 }, in sunxi_dram_init()
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.cfg83 /* tDLLK=0x1ff+1,tRTP=3+1,tWTR=3+1,tRRD=3+1 */
/external/u-boot/arch/arm/include/asm/
Demif.h1146 u8 tRRD; member
1175 u32 tRRD; member
/external/u-boot/board/buffalo/lsxl/
Dkwbimage-lsxhl.cfg62 # bit27-24: 2, 3 cycle tRRD
Dkwbimage-lschl.cfg62 # bit27-24: 3, 4 cycle tRRD
/external/u-boot/board/d-link/dns325/
Dkwbimage.cfg59 # bit27-24: 2, 3 cycle tRRD
/external/u-boot/arch/arm/mach-omap2/
Demif-common.c694 val = max(min_tck->tRRD, ns_2_cycles(timings->tRRD)) - 1; in get_sdram_tim_1_reg()