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Searched refs:tWTR (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c122 struct dram_sun9i_timing tWTR; member
385 const u32 tWTR = MAX(para->tWTR.ck, PS2CYCLES_ROUNDUP(para->tWTR.ps)); in mctl_channel_init() local
518 #define WR2PRE (MCTL_BL/2 + CWL + tWTR) in mctl_channel_init()
520 #define WR2RD (MCTL_BL/2 + CWL + tWTR) in mctl_channel_init()
642 (tRCD << 12) | (tRP << 8) | (tWTR << 4) | (tRTP << 0), in mctl_channel_init()
895 .tWTR = { .ck = 4, .ps = 7500 }, in sunxi_dram_init()
/external/u-boot/arch/arm/mach-omap2/omap5/
Demif.c61 .tWTR = 2,
Dsdram.c642 .tWTR = 2,
/external/u-boot/arch/arm/mach-omap2/omap4/
Demif.c84 .tWTR = 2,
Dsdram_elpida.c266 .tWTR = 2,
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.cfg83 /* tDLLK=0x1ff+1,tRTP=3+1,tWTR=3+1,tRRD=3+1 */
/external/u-boot/board/buffalo/lsxl/
Dkwbimage-lsxhl.cfg59 # bit19-16: 2, 3 cyle tWTR
Dkwbimage-lschl.cfg59 # bit19-16: 2, 3 cyle tWTR
/external/u-boot/board/d-link/dns325/
Dkwbimage.cfg56 # bit19-16: 2, 3 cyle tWTR
/external/u-boot/arch/arm/include/asm/
Demif.h1176 u32 tWTR; member
/external/u-boot/arch/arm/mach-omap2/
Demif-common.c687 val = max(min_tck->tWTR, ns_x2_2_cycles(timings->tWTRx2)) - 1; in get_sdram_tim_1_reg()