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Searched refs:tcs_in_layout (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_draw.c116 unsigned tcs_in_layout, tcs_out_layout, tcs_out_offsets; in si_emit_derived_tess_state() local
234 tcs_in_layout = S_VS_STATE_LS_OUT_PATCH_SIZE(input_patch_size / 4) | in si_emit_derived_tess_state()
257 sctx->current_vs_state |= tcs_in_layout; in si_emit_derived_tess_state()
292 radeon_emit(cs, tcs_in_layout); in si_emit_derived_tess_state()
/external/mesa3d/src/amd/vulkan/
Dradv_private.h1180 uint32_t tcs_in_layout; member
Dradv_cmd_buffer.c883 radeon_emit(cmd_buffer->cs, pipeline->graphics.tess.tcs_in_layout); in radv_emit_tess_shaders()
903 pipeline->graphics.tess.tcs_in_layout); in radv_emit_tess_shaders()
Dradv_pipeline.c1451 tess->tcs_in_layout = (input_patch_size / 4) | in calculate_tess_state()
/external/mesa3d/src/amd/common/
Dac_nir_to_llvm.c110 LLVMValueRef tcs_in_layout; member
442 return unpack_param(&ctx->ac, ctx->tcs_in_layout, 0, 13); in get_tcs_in_patch_stride()
882 &ctx->tcs_in_layout); in create_function()
907 &ctx->tcs_in_layout); in create_function()
2922 stride = unpack_param(&ctx->ac, ctx->tcs_in_layout, 13, 8); in load_tcs_varyings()