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1 // RUN: %clang_cc1 %s -O3 -triple=x86_64-unknown-unknown -target-feature +tbm -emit-llvm -o - | FileCheck %s
2 // FIXME: The code generation checks for add/sub and/or are depending on the optimizer.
3 // The REQUIRES keyword will be removed when the FIXME is complete.
4 // REQUIRES: x86-registered-target
5 
6 // Don't include mm_malloc.h, it's system specific.
7 #define __MM_MALLOC_H
8 
9 #include <x86intrin.h>
10 
11 // NOTE: This should match the tests in llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
12 
test__bextri_u32(unsigned int a)13 unsigned int test__bextri_u32(unsigned int a) {
14   // CHECK-LABEL: test__bextri_u32
15   // CHECK: call i32 @llvm.x86.tbm.bextri.u32(i32 %{{.*}}, i32 1)
16   return __bextri_u32(a, 1);
17 }
18 
test__bextri_u64(unsigned long long a)19 unsigned long long test__bextri_u64(unsigned long long a) {
20   // CHECK-LABEL: test__bextri_u64
21   // CHECK: call i64 @llvm.x86.tbm.bextri.u64(i64 %{{.*}}, i64 2)
22   return __bextri_u64(a, 2);
23 }
24 
test__bextri_u64_bigint(unsigned long long a)25 unsigned long long test__bextri_u64_bigint(unsigned long long a) {
26   // CHECK-LABEL: test__bextri_u64_bigint
27   // CHECK: call i64 @llvm.x86.tbm.bextri.u64(i64 %{{.*}}, i64 549755813887)
28   return __bextri_u64(a, 0x7fffffffffLL);
29 }
30 
test__blcfill_u32(unsigned int a)31 unsigned int test__blcfill_u32(unsigned int a) {
32   // CHECK-LABEL: test__blcfill_u32
33   // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
34   // CHECK-NEXT: %{{.*}} = and i32 [[TMP]], [[SRC]]
35   return __blcfill_u32(a);
36 }
37 
test__blcfill_u64(unsigned long long a)38 unsigned long long test__blcfill_u64(unsigned long long a) {
39   // CHECK-LABEL: test__blcfill_u64
40   // CHECK: [[TMPT:%.*]] = add i64 [[SRC:%.*]], 1
41   // CHECK-NEXT: %{{.*}} = and i64 [[TMP]], [[SRC]]
42   return __blcfill_u64(a);
43 }
44 
test__blci_u32(unsigned int a)45 unsigned int test__blci_u32(unsigned int a) {
46   // CHECK-LABEL: test__blci_u32
47   // CHECK: [[TMP:%.*]] = sub i32 -2, [[SRC:%.*]]
48   // CHECK-NEXT: %{{.*}} = or i32 [[TMP]], [[SRC]]
49   return __blci_u32(a);
50 }
51 
test__blci_u64(unsigned long long a)52 unsigned long long test__blci_u64(unsigned long long a) {
53   // CHECK-LABEL: test__blci_u64
54   // CHECK: [[TMP:%.*]] = sub i64 -2, [[SRC:%.*]]
55   // CHECK-NEXT: %{{.*}} = or i64 [[TMP]], [[SRC]]
56   return __blci_u64(a);
57 }
58 
test__blcic_u32(unsigned int a)59 unsigned int test__blcic_u32(unsigned int a) {
60   // CHECK-LABEL: test__blcic_u32
61   // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
62   // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC]], 1
63   // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
64   return __blcic_u32(a);
65 }
66 
test__blcic_u64(unsigned long long a)67 unsigned long long test__blcic_u64(unsigned long long a) {
68   // CHECK-LABEL: test__blcic_u64
69   // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
70   // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC]], 1
71   // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
72   return __blcic_u64(a);
73 }
74 
test__blcmsk_u32(unsigned int a)75 unsigned int test__blcmsk_u32(unsigned int a) {
76   // CHECK-LABEL: test__blcmsk_u32
77   // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
78   // CHECK-NEXT: {{.*}} = xor i32 [[TMP]], [[SRC]]
79   return __blcmsk_u32(a);
80 }
81 
test__blcmsk_u64(unsigned long long a)82 unsigned long long test__blcmsk_u64(unsigned long long a) {
83   // CHECK-LABEL: test__blcmsk_u64
84   // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1
85   // CHECK-NEXT: {{.*}} = xor i64 [[TMP]], [[SRC]]
86   return __blcmsk_u64(a);
87 }
88 
test__blcs_u32(unsigned int a)89 unsigned int test__blcs_u32(unsigned int a) {
90   // CHECK-LABEL: test__blcs_u32
91   // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1
92   // CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]]
93   return __blcs_u32(a);
94 }
95 
test__blcs_u64(unsigned long long a)96 unsigned long long test__blcs_u64(unsigned long long a) {
97   // CHECK-LABEL: test__blcs_u64
98   // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1
99   // CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]]
100   return __blcs_u64(a);
101 }
102 
test__blsfill_u32(unsigned int a)103 unsigned int test__blsfill_u32(unsigned int a) {
104   // CHECK-LABEL: test__blsfill_u32
105   // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], -1
106   // CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]]
107   return __blsfill_u32(a);
108 }
109 
test__blsfill_u64(unsigned long long a)110 unsigned long long test__blsfill_u64(unsigned long long a) {
111   // CHECK-LABEL: test__blsfill_u64
112   // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], -1
113   // CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]]
114   return __blsfill_u64(a);
115 }
116 
test__blsic_u32(unsigned int a)117 unsigned int test__blsic_u32(unsigned int a) {
118   // CHECK-LABEL: test__blsic_u32
119   // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
120   // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1
121   // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
122   return __blsic_u32(a);
123 }
124 
test__blsic_u64(unsigned long long a)125 unsigned long long test__blsic_u64(unsigned long long a) {
126   // CHECK-LABEL: test__blsic_u64
127   // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
128   // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1
129   // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
130   return __blsic_u64(a);
131 }
132 
test__t1mskc_u32(unsigned int a)133 unsigned int test__t1mskc_u32(unsigned int a) {
134   // CHECK-LABEL: test__t1mskc_u32
135   // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
136   // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], 1
137   // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
138   return __t1mskc_u32(a);
139 }
140 
test__t1mskc_u64(unsigned long long a)141 unsigned long long test__t1mskc_u64(unsigned long long a) {
142   // CHECK-LABEL: test__t1mskc_u64
143   // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
144   // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], 1
145   // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
146   return __t1mskc_u64(a);
147 }
148 
test__tzmsk_u32(unsigned int a)149 unsigned int test__tzmsk_u32(unsigned int a) {
150   // CHECK-LABEL: test__tzmsk_u32
151   // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
152   // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1
153   // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
154   return __tzmsk_u32(a);
155 }
156 
test__tzmsk_u64(unsigned long long a)157 unsigned long long test__tzmsk_u64(unsigned long long a) {
158   // CHECK-LABEL: test__tzmsk_u64
159   // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
160   // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1
161   // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
162   return __tzmsk_u64(a);
163 }
164