Searched refs:test_v4i32 (Results 1 – 25 of 30) sorted by relevance
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | vec_mul.ll | 7 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { 13 ; CHECK-LABEL: test_v4i32: 16 ; CHECK-LE-LABEL: test_v4i32: 19 ; CHECK-VSX-LABEL: test_v4i32: 22 ; CHECK-LE-VSX-LABEL: test_v4i32:
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D | vec_clz.ll | 26 define <4 x i32> @test_v4i32(<4 x i32> %x) nounwind readnone { 29 ; CHECK: @test_v4i32
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D | ppc64le-aggregates.ll | 163 tail call void @test_v4i32(i64 %x, [4 x <4 x i32>] %y, i64 %x) 168 ; CHECK: bl test_v4i32 170 declare void @test_v4i32(i64, [4 x <4 x i32>], i64)
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/external/llvm/test/CodeGen/PowerPC/ |
D | vec_mul.ll | 7 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { 13 ; CHECK-LABEL: test_v4i32: 16 ; CHECK-LE-LABEL: test_v4i32: 19 ; CHECK-VSX-LABEL: test_v4i32: 22 ; CHECK-LE-VSX-LABEL: test_v4i32:
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D | vec_clz.ll | 26 define <4 x i32> @test_v4i32(<4 x i32> %x) nounwind readnone { 29 ; CHECK: @test_v4i32
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D | ppc64le-aggregates.ll | 159 tail call void @test_v4i32(i64 %x, [4 x <4 x i32>] %y, i64 %x) 164 ; CHECK: bl test_v4i32 166 declare void @test_v4i32(i64, [4 x <4 x i32>], i64)
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/external/clang/test/CodeGen/ |
D | mips-vector-return.c | 28 v4i32 test_v4i32(int a) { in test_v4i32() function
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D | mips-vector-arg.c | 25 void test_v4i32(v4i32 a1, int a2, v4i32 a3) { in test_v4i32() function
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D | mips-varargs.c | 126 int test_v4i32(char *fmt, ...) { in test_v4i32() function
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/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
D | vec_mul.ll | 4 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) {
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/external/llvm/test/CodeGen/X86/ |
D | fast-isel-vecload.ll | 28 define <4 x i32> @test_v4i32(<4 x i32>* %V) { 29 ; ALL-LABEL: test_v4i32:
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D | nontemporal-loads.ll | 34 define <4 x i32> @test_v4i32(<4 x i32>* %src) { 35 ; SSE2-LABEL: test_v4i32: 40 ; SSE41-LABEL: test_v4i32: 45 ; AVX-LABEL: test_v4i32: 50 ; AVX512F-LABEL: test_v4i32: 55 ; AVX512BW-LABEL: test_v4i32: 60 ; AVX512VL-LABEL: test_v4i32:
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | fast-isel-vecload.ll | 60 define <4 x i32> @test_v4i32(<4 x i32>* %V) { 61 ; SSE-LABEL: test_v4i32: 66 ; AVXONLY-LABEL: test_v4i32: 71 ; KNL-LABEL: test_v4i32: 76 ; SKX-LABEL: test_v4i32:
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D | vector-reduce-add.ll | 197 define i32 @test_v4i32(<4 x i32> %a0) { 198 ; SSE2-LABEL: test_v4i32: 207 ; SSE41-LABEL: test_v4i32: 215 ; AVX-LABEL: test_v4i32: 223 ; AVX512-LABEL: test_v4i32:
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D | vector-reduce-and.ll | 189 define i32 @test_v4i32(<4 x i32> %a0) { 190 ; SSE-LABEL: test_v4i32: 199 ; AVX-LABEL: test_v4i32: 208 ; AVX512-LABEL: test_v4i32:
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D | vector-reduce-or.ll | 189 define i32 @test_v4i32(<4 x i32> %a0) { 190 ; SSE-LABEL: test_v4i32: 199 ; AVX-LABEL: test_v4i32: 208 ; AVX512-LABEL: test_v4i32:
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D | vector-reduce-xor.ll | 189 define i32 @test_v4i32(<4 x i32> %a0) { 190 ; SSE-LABEL: test_v4i32: 199 ; AVX-LABEL: test_v4i32: 208 ; AVX512-LABEL: test_v4i32:
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D | nontemporal-loads.ll | 34 define <4 x i32> @test_v4i32(<4 x i32>* %src) { 35 ; SSE2-LABEL: test_v4i32: 40 ; SSE41-LABEL: test_v4i32: 45 ; AVX-LABEL: test_v4i32: 50 ; AVX512-LABEL: test_v4i32:
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D | vector-reduce-smax.ll | 694 define i32 @test_v4i32(<4 x i32> %a0) { 695 ; SSE2-LABEL: test_v4i32: 712 ; SSE41-LABEL: test_v4i32: 721 ; AVX-LABEL: test_v4i32: 730 ; AVX512-LABEL: test_v4i32:
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D | vector-reduce-smin.ll | 693 define i32 @test_v4i32(<4 x i32> %a0) { 694 ; SSE2-LABEL: test_v4i32: 711 ; SSE41-LABEL: test_v4i32: 720 ; AVX-LABEL: test_v4i32: 729 ; AVX512-LABEL: test_v4i32:
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | cttz_vector.ll | 152 define void @test_v4i32(<4 x i32>* %p) { 153 ; CHECK-LABEL: test_v4i32:
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/external/llvm/test/CodeGen/ARM/ |
D | cttz_vector.ll | 152 define void @test_v4i32(<4 x i32>* %p) { 153 ; CHECK-LABEL: test_v4i32:
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/external/llvm/test/Analysis/CostModel/X86/ |
D | alternate-shuffle-cost.ll | 109 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) { 113 ; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i32':
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/ |
D | param-load-store.ll | 509 ; CHECK-LABEL: test_v4i32( 516 ; CHECK-NEXT: test_v4i32, 520 define <4 x i32> @test_v4i32(<4 x i32> %a) { 521 %r = tail call <4 x i32> @test_v4i32(<4 x i32> %a);
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/ |
D | alternate-shuffle-cost.ll | 152 define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) { 153 ; SSE2-LABEL: 'test_v4i32' 157 ; SSSE3-LABEL: 'test_v4i32' 161 ; SSE42-LABEL: 'test_v4i32' 165 ; AVX-LABEL: 'test_v4i32' 169 ; BTVER2-LABEL: 'test_v4i32'
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