| /external/linux-kselftest/tools/testing/selftests/powerpc/ptrace/ |
| D | ptrace.h | 690 void analyse_texasr(unsigned long texasr) in analyse_texasr() argument
692 printf("TEXASR: %16lx\t", texasr); in analyse_texasr()
694 if (texasr & TEXASR_FP) in analyse_texasr()
697 if (texasr & TEXASR_DA) in analyse_texasr()
700 if (texasr & TEXASR_NO) in analyse_texasr()
703 if (texasr & TEXASR_FO) in analyse_texasr()
706 if (texasr & TEXASR_SIC) in analyse_texasr()
709 if (texasr & TEXASR_NTC) in analyse_texasr()
712 if (texasr & TEXASR_TC) in analyse_texasr()
715 if (texasr & TEXASR_TIC) in analyse_texasr()
[all …]
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| D | ptrace-tm-tar.c | 21 unsigned long result, texasr; in tm_tar() local
64 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_tar()
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| D | ptrace-tm-gpr.c | 26 unsigned long result, texasr; in tm_gpr() local
60 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_gpr()
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| D | ptrace-tm-spd-tar.c | 27 unsigned long result, texasr; in tm_spd_tar() local
74 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_spd_tar()
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| D | ptrace-tm-spd-gpr.c | 34 unsigned long result, texasr; in tm_spd_gpr() local
68 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_spd_gpr()
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| D | ptrace-tm-spr.c | 38 unsigned long result, texasr; in tm_spr() local
77 [texasr] "=r" (texasr), [cptr1] "=r" (cptr1) in tm_spr()
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| D | ptrace-tm-vsx.c | 35 unsigned long result, texasr; in tm_vsx() local
67 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_vsx()
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| D | ptrace-tm-spd-vsx.c | 48 unsigned long result, texasr; in tm_spd_vsx() local
79 : [res] "=r" (result), [texasr] "=r" (texasr) in tm_spd_vsx()
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/tm/ |
| D | tm-vmx-unavail.c | 30 uint64_t texasr; in worker() local
69 texasr = __builtin_get_texasr(); in worker()
72 printf("Failure with error: %lx\n", _TEXASR_FAILURE_CODE(texasr)); in worker()
73 printf("Summary error : %lx\n", _TEXASR_FAILURE_SUMMARY(texasr)); in worker()
74 printf("TFIAR exact : %lx\n\n", _TEXASR_TFIAR_EXACT(texasr)); in worker()
|
| D | tm-resched-dscr.c | 40 uint64_t rv, dscr1 = 1, dscr2, texasr; in test_body() local
73 : [rv]"=r"(rv), [dscr2]"=m"(dscr2), [texasr]"=m"(texasr) in test_body()
79 if ((texasr >> 56) != TM_CAUSE_RESCHED) { in test_body()
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| D | tm-tmspr.c | 73 void texasr(void *in) in texasr() function
122 if (pthread_create(&thread[i], NULL, (void *)texasr, (void *)i)) in test_tmspr()
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | htm.ll | 74 tail call void @llvm.ppc.set.texasr(i64 %v)
88 %0 = tail call i64 @llvm.ppc.get.texasr()
118 declare void @llvm.ppc.set.texasr(i64)
122 declare i64 @llvm.ppc.get.texasr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | htm.ll | 74 tail call void @llvm.ppc.set.texasr(i64 %v)
88 %0 = tail call i64 @llvm.ppc.get.texasr()
118 declare void @llvm.ppc.set.texasr(i64)
122 declare i64 @llvm.ppc.get.texasr()
|
| /external/elfutils/tests/ |
| D | run-allregs.sh | 258 116: texasr (texasr), unsigned 32 bits
1281 116: texasr (texasr), unsigned 64 bits
|
| D | run-addrcfi.sh | 402 privileged reg116 (texasr): undefined
1424 privileged reg116 (texasr): undefined
2452 privileged reg116 (texasr): undefined
|
| /external/elfutils/backends/ |
| D | ChangeLog | 179 and texasr.
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
| D | IntrinsicEnums.inc | 4964 ppc_get_texasr, // llvm.ppc.get.texasr
5055 ppc_set_texasr, // llvm.ppc.set.texasr
|
| D | IntrinsicImpl.inc | 4990 "llvm.ppc.get.texasr",
5081 "llvm.ppc.set.texasr",
13868 3, // llvm.ppc.get.texasr
13959 3, // llvm.ppc.set.texasr
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 4023 ppc_get_texasr, // llvm.ppc.get.texasr
4113 ppc_set_texasr, // llvm.ppc.set.texasr
10081 "llvm.ppc.get.texasr",
10171 "llvm.ppc.set.texasr",
18021 3, // llvm.ppc.get.texasr
18111 3, // llvm.ppc.set.texasr
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 4023 ppc_get_texasr, // llvm.ppc.get.texasr
4113 ppc_set_texasr, // llvm.ppc.set.texasr
10081 "llvm.ppc.get.texasr",
10171 "llvm.ppc.set.texasr",
18021 3, // llvm.ppc.get.texasr
18111 3, // llvm.ppc.set.texasr
|
| /external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
| D | Intrinsics.gen | 4023 ppc_get_texasr, // llvm.ppc.get.texasr
4113 ppc_set_texasr, // llvm.ppc.set.texasr
10081 "llvm.ppc.get.texasr",
10171 "llvm.ppc.set.texasr",
18021 3, // llvm.ppc.get.texasr
18111 3, // llvm.ppc.set.texasr
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 4017 ppc_get_texasr, // llvm.ppc.get.texasr
4107 ppc_set_texasr, // llvm.ppc.set.texasr
10041 "llvm.ppc.get.texasr",
10131 "llvm.ppc.set.texasr",
17926 3, // llvm.ppc.get.texasr
18016 3, // llvm.ppc.set.texasr
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 4023 ppc_get_texasr, // llvm.ppc.get.texasr
4113 ppc_set_texasr, // llvm.ppc.set.texasr
10081 "llvm.ppc.get.texasr",
10171 "llvm.ppc.set.texasr",
18021 3, // llvm.ppc.get.texasr
18111 3, // llvm.ppc.set.texasr
|