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/external/tensorflow/tensorflow/contrib/grid_rnn/python/ops/
Dgrid_rnn_cell.py57 tied=False, argument
122 non_recurrent_fn or nn.relu, tied,
133 if tied:
337 tied=False,
355 tied=False, argument
365 tied=tied,
389 tied=False,
407 tied=False, argument
420 tied=tied,
468 tied=False, argument
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/MIR/X86/
Ddef-register-already-tied-error.mir20 ; CHECK: [[@LINE+1]]:83: the tied-def operand #3 is already tied with another register operand
21 …INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 3), killed $rdi(tied-def…
Dinline-asm-registers.mir48 …f $rsi, 2818058, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-…
49 …f $rsi, 2818058, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-…
Dexpected-integer-after-tied-def.mir20 ; CHECK: [[@LINE+1]]:78: expected tied-def or low-level type after '('
21 INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def)
Dtied-def-operand-invalid.mir20 …; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '0'; the operand #0 isn't a defined…
21 INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 0)
Dinvalid-tied-def-index-error.mir20 …; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '300'; instruction has only 6 opera…
21 INLINEASM &"$foo", 1, 2818058, def $rdi, 2147483657, killed $rdi(tied-def 300)
Dtied-physical-regs-match.mir2 # This test ensures that the Machine Verifier detects tied physical registers
Dexpected-tied-def-after-lparen.mir20 ; CHECK: [[@LINE+1]]:70: expected tied-def or low-level type after '('
/external/llvm/test/CodeGen/MIR/X86/
Ddef-register-already-tied-error.mir21 ; CHECK: [[@LINE+1]]:83: the tied-def operand #3 is already tied with another register operand
22 …INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 3), killed %rdi(tied-def…
Dinline-asm-registers.mir50 …f %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-…
51 …f %rsi, 2818058, def dead %rdi, 2147549193, killed %rdi(tied-def 5), 2147483657, killed %rsi(tied-…
Dexpected-integer-after-tied-def.mir21 ; CHECK: [[@LINE+1]]:78: expected an integer literal after 'tied-def'
22 INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def)
Dinvalid-tied-def-index-error.mir21 …; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '300'; instruction has only 6 opera…
22 INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 300)
Dtied-def-operand-invalid.mir21 …; CHECK: [[@LINE+1]]:58: use of invalid tied-def operand index '0'; the operand #0 isn't a defined…
22 INLINEASM $"$foo", 1, 2818058, def %rdi, 2147483657, killed %rdi(tied-def 0)
Dexpected-tied-def-after-lparen.mir21 ; CHECK: [[@LINE+1]]:70: expected 'tied-def' after '('
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Drename-independent-subregs.mir71 # In this test, there are two pairs of tied operands
76 …sub0, 327690, def dead %1.sub1, 2147483657, undef %0.sub0(tied-def 3), 2147549193, %1.sub1(tied-de…
84 …ef %0.sub1:vreg_64, 2147483657, undef %0.sub0:vreg_64(tied-def 3), 2147549193, %0.sub1:vreg_64(tie…
Dsdwa-preserve.mir97 %17:vgpr_32 = V_MOV_B32_sdwa 0, %4, 0, 5, 2, 4, implicit $exec, implicit %11(tied-def 0)
140 %17:vgpr_32 = V_MOV_B32_sdwa 0, %4, 0, 5, 2, 4, implicit $exec, implicit %11(tied-def 0)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dexpand-condsets-impuse2.mir3 # Check that there is a tied implicit use despite having an explicit (but
5 # CHECK: %[[R:[0-9]+]]:intregs = A2_paddif killed %{{[0-9]+}}, %[[R]], 1, implicit %[[R]](tied-def …
/external/flatbuffers/docs/source/
DBenchmarks.md49 Being tied to the language, and having no automatic versioning support
53 fields manually), is very much tied to the rest of the engine, and works
54 without a schema to generate code (tied to your C++ class definition).
/external/libunwind/doc/
Dunw_flush_cache.tex22 address-space \Var{as} that is not tied to a particular code-range is
24 list is not tied to a code-range and its cached value (if any) is
/external/python/cpython3/Tools/pynche/
DREADME267 slider is tied together. For example, if Red and Green are
276 When the increment or decrement would send any of the tied
280 When the increment or decrement would send any of the tied
286 When the increment or decrement would send any of the tied
287 variations out of bounds, all tied variations are wrapped as
289 green and blue were tied, and green was at 238 while blue was
294 When the increment or decrement would send any of the tied
297 way, all tied variations are squashed to one edge or the
/external/python/cpython2/Tools/pynche/
DREADME267 slider is tied together. For example, if Red and Green are
276 When the increment or decrement would send any of the tied
280 When the increment or decrement would send any of the tied
286 When the increment or decrement would send any of the tied
287 variations out of bounds, all tied variations are wrapped as
289 green and blue were tied, and green was at 238 while blue was
294 When the increment or decrement would send any of the tied
297 way, all tied variations are squashed to one edge or the
/external/swiftshader/third_party/llvm-7.0/llvm/docs/CommandGuide/
Dllvm-build.rst73 file are closely tied to how LLVMBuild is integrated with CMake, see LLVM's
82 file are closely tied to how LLVMBuild is integrated with the Makefiles, see
/external/llvm/docs/CommandGuide/
Dllvm-build.rst73 file are closely tied to how LLVMBuild is integrated with CMake, see LLVM's
82 file are closely tied to how LLVMBuild is integrated with the Makefiles, see
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dindirect-reg-input.ll4 ; CHECK: error: inline asm not supported yet: don't know how to handle tied indirect register inputs
/external/llvm/test/CodeGen/ARM/
Dindirect-reg-input.ll4 ; CHECK: error: inline asm not supported yet: don't know how to handle tied indirect register inputs

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