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Searched refs:tile_mode (Results 1 – 25 of 40) sorted by relevance

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/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_miptree.c35 uint32_t tile_mode = 0x000; in nv50_tex_choose_tile_dims_helper() local
37 if (ny > 64) tile_mode = 0x040; /* height 128 tiles */ in nv50_tex_choose_tile_dims_helper()
39 if (ny > 32) tile_mode = 0x030; /* height 64 tiles */ in nv50_tex_choose_tile_dims_helper()
41 if (ny > 16) tile_mode = 0x020; /* height 32 tiles */ in nv50_tex_choose_tile_dims_helper()
43 if (ny > 8) tile_mode = 0x010; /* height 16 tiles */ in nv50_tex_choose_tile_dims_helper()
46 return tile_mode; in nv50_tex_choose_tile_dims_helper()
48 if (tile_mode > 0x020) in nv50_tex_choose_tile_dims_helper()
49 tile_mode = 0x020; in nv50_tex_choose_tile_dims_helper()
51 if (nz > 16 && tile_mode < 0x020) in nv50_tex_choose_tile_dims_helper()
52 return tile_mode | 0x500; /* depth 32 tiles */ in nv50_tex_choose_tile_dims_helper()
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Dnv50_transfer.h18 uint16_t tile_mode; member
Dnv50_transfer.c41 rect->tile_mode = mt->level[l].tile_mode; in nv50_m2mf_rect_setup()
79 PUSH_DATA (push, src->tile_mode); in nv50_m2mf_transfer_rect()
96 PUSH_DATA (push, dst->tile_mode); in nv50_m2mf_transfer_rect()
Dnv50_resource.h43 uint32_t tile_mode; member
Dnv50_tex.c157 ((mt->level[0].tile_mode & 0x0f0) << (22 - 4)) | in nv50_create_texture_view()
158 ((mt->level[0].tile_mode & 0xf00) << (25 - 8)); in nv50_create_texture_view()
/external/libdrm/radeon/
Dradeon_surface.c1288 unsigned mode, unsigned *tile_mode, unsigned *stencil_tile_mode) in si_surface_sanity() argument
1353 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D; in si_surface_sanity()
1356 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_2AA; in si_surface_sanity()
1359 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_4AA; in si_surface_sanity()
1362 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_8AA; in si_surface_sanity()
1370 *tile_mode = SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP; in si_surface_sanity()
1373 *tile_mode = SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP; in si_surface_sanity()
1381 *tile_mode = SI_TILE_MODE_COLOR_2D_8BPP; in si_surface_sanity()
1384 *tile_mode = SI_TILE_MODE_COLOR_2D_16BPP; in si_surface_sanity()
1387 *tile_mode = SI_TILE_MODE_COLOR_2D_32BPP; in si_surface_sanity()
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/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_miptree.c177 mt->level[0].tile_mode = 0x10; in nvc0_miptree_init_layout_video()
214 lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d); in nvc0_miptree_init_layout_tiled()
216 tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */ in nvc0_miptree_init_layout_tiled()
217 tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode); in nvc0_miptree_init_layout_tiled()
218 tsz = NVC0_TILE_SIZE_Z(lvl->tile_mode); in nvc0_miptree_init_layout_tiled()
231 NVC0_TILE_SIZE(mt->level[0].tile_mode)); in nvc0_miptree_init_layout_tiled()
300 bo_config.nvc0.tile_mode = mt->level[0].tile_mode; in nvc0_miptree_create()
333 unsigned tds = NVC0_TILE_SHIFT_Z(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
334 unsigned ths = NVC0_TILE_SHIFT_Y(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
340 unsigned stride_2d = NVC0_TILE_SIZE_2D(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
Dnvc0_video_bsp.c71 cfg.nvc0.tile_mode = 0x10; in nvc0_decoder_bsp_next()
107 cfg.nvc0.tile_mode = 0x10; in nvc0_decoder_bsp_next()
Dnvc0_tex.c162 ((mt->level[0].tile_mode & 0x0f0) >> 4 << 3) | in gm107_create_texture_view()
163 ((mt->level[0].tile_mode & 0xf00) >> 8 << 6); in gm107_create_texture_view()
370 ((mt->level[0].tile_mode & 0x0f0) << (22 - 4)) | in gf100_create_texture_view()
371 ((mt->level[0].tile_mode & 0xf00) << (25 - 8)); in gf100_create_texture_view()
1052 info[4] |= (lvl->tile_mode & 0x0f0) << 25; in nve4_set_surface_info()
1053 info[4] |= NVC0_TILE_SHIFT_Y(lvl->tile_mode) << 22; in nve4_set_surface_info()
1056 info[6] |= (lvl->tile_mode & 0xf00) << 21; in nve4_set_surface_info()
1057 info[6] |= NVC0_TILE_SHIFT_Z(lvl->tile_mode) << 22; in nve4_set_surface_info()
1173 PUSH_DATA (push, lvl->tile_mode & 0xff); /* mask out z-tiling */ in nvc0_validate_suf()
Dnvc0_transfer.c39 PUSH_DATA (push, src->tile_mode); in nvc0_m2mf_transfer_rect()
55 PUSH_DATA (push, dst->tile_mode); in nvc0_m2mf_transfer_rect()
156 PUSH_DATA (push, 0x1000 | dst->tile_mode); in nve4_m2mf_transfer_rect()
170 PUSH_DATA (push, 0x1000 | src->tile_mode); in nve4_m2mf_transfer_rect()
/external/libdrm/nouveau/
Dabi16.c294 bo->config.nvc0.tile_mode = info->tile_mode; in abi16_bo_info()
299 bo->config.nv50.tile_mode = info->tile_mode << 4; in abi16_bo_info()
302 bo->config.nv04.surf_pitch = info->tile_mode; in abi16_bo_info()
339 info->tile_mode = config->nvc0.tile_mode; in abi16_bo_init()
344 info->tile_mode = config->nv50.tile_mode >> 4; in abi16_bo_init()
347 info->tile_mode = config->nv04.surf_pitch; in abi16_bo_init()
Dnouveau.h103 uint32_t tile_mode; member
107 uint32_t tile_mode; member
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_dma.c144 unsigned tile_mode = info->si_tile_mode_array[index]; in si_dma_copy_tile() local
167 array_mode = G_009910_ARRAY_MODE(tile_mode); in si_dma_copy_tile()
180 bank_h = G_009910_BANK_HEIGHT(tile_mode); in si_dma_copy_tile()
181 bank_w = G_009910_BANK_WIDTH(tile_mode); in si_dma_copy_tile()
182 mt_aspect = G_009910_MACRO_TILE_ASPECT(tile_mode); in si_dma_copy_tile()
185 nbanks = G_009910_NUM_BANKS(tile_mode); in si_dma_copy_tile()
189 pipe_config = G_009910_PIPE_CONFIG(tile_mode); in si_dma_copy_tile()
190 mt = G_009910_MICRO_TILE_MODE(tile_mode); in si_dma_copy_tile()
Dcik_sdma.c123 unsigned tile_mode = info->si_tile_mode_array[tile_index]; in encode_tile_info() local
127 (G_009910_ARRAY_MODE(tile_mode) << 3) | in encode_tile_info()
128 (G_009910_MICRO_TILE_MODE_NEW(tile_mode) << 8) | in encode_tile_info()
135 (G_009910_PIPE_CONFIG(tile_mode) << 26); in encode_tile_info()
/external/libdrm/include/drm/
Dnouveau_drm.h128 __u32 tile_mode; member
134 uint32_t tile_mode; member
261 uint32_t tile_mode; member
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_blitter.c101 if ((fd_resource(info->dst.resource)->tile_mode || in can_do_blit()
102 fd_resource(info->src.resource)->tile_mode) && in can_do_blit()
345 TILE5_LINEAR : src->tile_mode; in emit_blit()
347 TILE5_LINEAR : dst->tile_mode; in emit_blit()
471 assert(fd_resource(info->src.resource)->tile_mode == TILE5_LINEAR); in fd5_blitter_blit()
472 assert(fd_resource(info->dst.resource)->tile_mode == TILE5_LINEAR); in fd5_blitter_blit()
Dfd5_gmem.c49 enum a5xx_tile_mode tile_mode; in emit_mrt() local
64 tile_mode = TILE5_2; in emit_mrt()
66 tile_mode = TILE5_LINEAR; in emit_mrt()
96 tile_mode = rsc->tile_mode; in emit_mrt()
102 A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | in emit_mrt()
494 A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(rsc->tile_mode) | in emit_mem2gmem_surf()
630 tiled = rsc->tile_mode && in emit_gmem2mem_surf()
Dfd5_screen.c115 screen->tile_mode = fd5_tile_mode; in fd5_screen_init()
Dfd5_resource.c71 if (rsc->tile_mode && !linear_level) { in setup_slices()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c51 uint32_t tile_mode; in set_micro_tile_mode() local
58 tile_mode = info->si_tile_mode_array[surf->u.legacy.tiling_index[0]]; in set_micro_tile_mode()
61 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); in set_micro_tile_mode()
63 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); in set_micro_tile_mode()
/external/mesa3d/src/gallium/drivers/freedreno/
Dfreedreno_screen.h84 unsigned (*tile_mode)(const struct pipe_resource *prsc); member
Dfreedreno_resource.h100 unsigned tile_mode : 2; member
/external/kernel-headers/original/uapi/drm/
Dnouveau_drm.h55 __u32 tile_mode; member
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_gmem.c52 enum a4xx_tile_mode tile_mode; in emit_mrt() local
56 tile_mode = 2; in emit_mrt()
58 tile_mode = TILE4_LINEAR; in emit_mrt()
116 A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | in emit_mrt()
/external/libdrm/libkms/
Dnouveau.c109 arg.info.tile_mode = 0; in nouveau_bo_create()

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