Home
last modified time | relevance | path

Searched refs:tile_split (Results 1 – 21 of 21) sorted by relevance

/external/libdrm/radeon/
Dradeon_surface.c655 unsigned bpe, unsigned tile_split, in eg_surface_init_2d() argument
669 if (tileb > tile_split && tile_split) { in eg_surface_init_2d()
670 slice_pt = tileb / tile_split; in eg_surface_init_2d()
734 switch (surf->tile_split) { in eg_surface_sanity()
779 tileb = MIN2(surf->tile_split, 64 * surf->bpe * surf->nsamples); in eg_surface_sanity()
821 surf->tile_split, 0, 0); in eg_surface_init_2d_miptrees()
918 surf->tile_split = 1024; in eg_surface_best()
922 tileb = MIN2(surf->tile_split, 64 * surf->bpe * surf->nsamples); in eg_surface_best()
947 surf->tile_split = 128; in eg_surface_best()
950 surf->tile_split = 128; in eg_surface_best()
[all …]
Dradeon_surface.h133 uint32_t tile_split; member
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c36 tileb = MIN2(surf->u.legacy.tile_split, tileb); in cik_get_macro_tile_index()
154 surf_drm->tile_split = surf_ws->u.legacy.tile_split; in surf_winsys_to_drm()
196 surf_ws->u.legacy.tile_split = surf_drm->tile_split; in surf_drm_to_winsys()
Dradeon_drm_bo.c807 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
809 switch (tile_split) { in eg_tile_split()
810 case 0: tile_split = 64; break; in eg_tile_split()
811 case 1: tile_split = 128; break; in eg_tile_split()
812 case 2: tile_split = 256; break; in eg_tile_split()
813 case 3: tile_split = 512; break; in eg_tile_split()
815 case 4: tile_split = 1024; break; in eg_tile_split()
816 case 5: tile_split = 2048; break; in eg_tile_split()
817 case 6: tile_split = 4096; break; in eg_tile_split()
819 return tile_split; in eg_tile_split()
[all …]
/external/mesa3d/src/amd/addrlib/inc/chip/r800/
Dsi_gb_reg.h108 unsigned int tile_split : 3; member
136 unsigned int tile_split : 3; member
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_bo.c1047 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
1049 switch (tile_split) { in eg_tile_split()
1050 case 0: tile_split = 64; break; in eg_tile_split()
1051 case 1: tile_split = 128; break; in eg_tile_split()
1052 case 2: tile_split = 256; break; in eg_tile_split()
1053 case 3: tile_split = 512; break; in eg_tile_split()
1055 case 4: tile_split = 1024; break; in eg_tile_split()
1056 case 5: tile_split = 2048; break; in eg_tile_split()
1057 case 6: tile_split = 4096; break; in eg_tile_split()
1059 return tile_split; in eg_tile_split()
[all …]
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_dma.c148 unsigned sub_cmd, bank_h, bank_w, mt_aspect, nbanks, tile_split, mt; in si_dma_copy_tile() local
184 tile_split = util_logbase2(rtiled->surface.u.legacy.tile_split >> 6); in si_dma_copy_tile()
209 radeon_emit(cs, (tiled_y << 0) | (tile_split << 21) | (nbanks << 25) | (mt << 27)); in si_dma_copy_tile()
Dcik_sdma.c130 ((util_logbase2(tex->surface.u.legacy.tile_split >> 6)) << 11) | in encode_tile_info()
387 tiled->surface.u.legacy.tile_split <= 4096 && in cik_sdma_copy_texture()
431 rsrc->surface.u.legacy.tile_split <= 4096 && in cik_sdma_copy_texture()
432 rdst->surface.u.legacy.tile_split <= 4096 && in cik_sdma_copy_texture()
/external/mesa3d/src/gallium/drivers/r600/
Devergreen_state.c63 static unsigned eg_tile_split(unsigned tile_split) in eg_tile_split() argument
65 switch (tile_split) { in eg_tile_split()
66 case 64: tile_split = 0; break; in eg_tile_split()
67 case 128: tile_split = 1; break; in eg_tile_split()
68 case 256: tile_split = 2; break; in eg_tile_split()
69 case 512: tile_split = 3; break; in eg_tile_split()
71 case 1024: tile_split = 4; break; in eg_tile_split()
72 case 2048: tile_split = 5; break; in eg_tile_split()
73 case 4096: tile_split = 6; break; in eg_tile_split()
75 return tile_split; in eg_tile_split()
[all …]
Dradeon_video.c178 surfaces[i]->u.legacy.tile_split = surfaces[best_tiling]->u.legacy.tile_split; in rvid_join_surfaces()
Dr600_texture.c287 metadata->u.legacy.tile_split = surface->u.legacy.tile_split; in r600_texture_init_metadata()
303 surf->u.legacy.tile_split = metadata->u.legacy.tile_split; in r600_surface_import_metadata()
594 fmask.u.legacy.tile_split = rtex->surface.u.legacy.tile_split; in r600_texture_get_fmask_info()
824 rtex->surface.u.legacy.tile_split, rtex->surface.u.legacy.pipe_config, in r600_print_texture_info()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_video.c173 surfaces[i]->u.legacy.tile_split = surfaces[best_tiling]->u.legacy.tile_split; in si_vid_join_surfaces()
Dradeon_winsys.h194 unsigned tile_split; member
Dr600_texture.c342 metadata->u.legacy.tile_split = surface->u.legacy.tile_split; in r600_texture_init_metadata()
370 surf->u.legacy.tile_split = metadata->u.legacy.tile_split; in r600_surface_import_metadata()
1122 rtex->surface.u.legacy.tile_split, rtex->surface.u.legacy.pipe_config, in si_print_texture_info()
/external/mesa3d/src/amd/common/
Dac_surface.h86 unsigned tile_split:13; /* max 4K */ member
Dac_surface.c405 tileb = MIN2(surf->u.legacy.tile_split, tileb); in cik_get_macro_tile_index()
435 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes; in gfx6_surface_settings()
630 surf->u.legacy.mtilea && surf->u.legacy.tile_split) { in gfx6_compute_surface()
639 AddrTileInfoIn.tileSplitBytes = surf->u.legacy.tile_split; in gfx6_compute_surface()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_bo.c520 if (md->u.legacy.tile_split) in radv_amdgpu_winsys_bo_set_metadata()
521 tiling_flags |= AMDGPU_TILING_SET(TILE_SPLIT, radv_eg_tile_split_rev(md->u.legacy.tile_split)); in radv_amdgpu_winsys_bo_set_metadata()
/external/mesa3d/src/amd/vulkan/
Dradv_radeon_winsys.h138 unsigned tile_split; member
Dradv_image.c641 metadata->u.legacy.tile_split = surface->u.legacy.tile_split; in radv_init_metadata()
/external/mesa3d/src/amd/addrlib/r800/
Dciaddrlib.cpp1591 pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; in ReadGbTileMode()
Dsiaddrlib.cpp3053 pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; in ReadGbTileMode()