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Searched refs:timer_base (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/
Dtimer.c12 static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE; variable
19 writel(TIMER_LOAD_VAL, &timer_base->load_val); in timer_init()
20 writel(TIMER_LOAD_VAL, &timer_base->curr_val); in timer_init()
21 writel(readl(&timer_base->ctrl) | 0x3, &timer_base->ctrl); in timer_init()
/external/u-boot/arch/arm/mach-omap2/
Dtimer.c25 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; variable
38 writel(TIMER_LOAD_VAL, &timer_base->tldr); in timer_init()
41 &timer_base->tclr); in timer_init()
58 unsigned long now, last = readl(&timer_base->tcrr); in __udelay()
61 now = readl(&timer_base->tcrr); in __udelay()
73 ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); in get_timer_masked()
/external/u-boot/arch/arm/mach-zynq/
Dtimer.c46 static struct scu_timer *timer_base = variable
84 writel(0xFFFFFFFF, &timer_base->load); in timer_init()
91 clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK, in timer_init()
95 gd->arch.lastinc = readl(&timer_base->counter) / in timer_init()