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Searched refs:tmp163 (Results 1 – 25 of 32) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Difcvt-dead-def.ll30 %tmp163 = load i16, i16* %tmp162, align 2
33 %tmp166 = icmp eq i16 %tmp163, %tmp165
/external/llvm/test/CodeGen/ARM/
Difcvt-dead-def.ll30 %tmp163 = load i16, i16* %tmp162, align 2
33 %tmp166 = icmp eq i16 %tmp163, %tmp165
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2006-05-01-SchedCausingSpills.ll36 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
37 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
D2009-03-23-MultiUseSched.ll175 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
177 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
D2007-08-09-IllegalX86-64Asm.ll203 %tmp163 = load i64* %tmp162 ; <i64> [#uses=1]
204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
/external/llvm/test/CodeGen/X86/
D2006-05-01-SchedCausingSpills.ll37 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
38 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
D2009-03-23-MultiUseSched.ll176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
178 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
D2007-08-09-IllegalX86-64Asm.ll203 %tmp163 = load i64, i64* %tmp162 ; <i64> [#uses=1]
204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D2006-05-01-SchedCausingSpills.ll37 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
38 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
D2009-03-23-MultiUseSched.ll176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
178 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
D2007-08-09-IllegalX86-64Asm.ll203 %tmp163 = load i64, i64* %tmp162 ; <i64> [#uses=1]
204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
/external/webrtc/webrtc/modules/audio_processing/aecm/
Daecm_core_mips.c1257 int16_t tmp16, tmp161, tmp162, tmp163, nrsh1, nrsh2; in ComfortNoise() local
1533 [tmp322] "+r" (tmp322), [tmp323] "+r" (tmp323), [tmp163] "=&r" (tmp163) in ComfortNoise()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dpv.ll166 %tmp163 = extractelement <4 x float> %tmp162, i32 2
167 %tmp164 = fmul float %tmp163, %tmp22
Dsi-spill-cf.ll191 %tmp163 = fsub float %tmp50, undef
194 %tmp166 = fmul float %tmp163, undef
Dvgpr-spill-emergency-stack-slot.ll226 %tmp163 = insertelement <128 x float> %tmp162, float %tmp102, i32 1
227 %tmp164 = insertelement <128 x float> %tmp163, float %tmp101, i32 2
Dvgpr-spill-emergency-stack-slot-compute.ll362 %tmp163 = insertelement <128 x float> %tmp162, float %tmp74, i32 13
363 %tmp164 = insertelement <128 x float> %tmp163, float %tmp73, i32 14
Dschedule-regpressure-limit.ll172 %tmp163 = load float, float addrspace(3)* %tmp162, align 4
177 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
Dschedule-ilp.ll169 %tmp163 = load float, float addrspace(3)* %tmp162, align 4
174 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
Dschedule-regpressure-limit3.ll171 %tmp163 = load float, float addrspace(3)* %tmp162, align 4
176 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
/external/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll185 %tmp163 = bitcast i32 %tmp162 to float
186 %tmp164 = fsub float %tmp163, %tmp161
820 %tmp163 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg4, <2 x i32> %arg6)
861 %tmp203 = fsub float -0.000000e+00, %tmp163
1252 %tmp544 = fsub float -0.000000e+00, %tmp163
1342 %tmp602 = fmul float %tmp163, %tmp84
1349 %tmp609 = fmul float %tmp163, %tmp88
1356 %tmp616 = fmul float %tmp163, %tmp92
Dvgpr-spill-emergency-stack-slot.ll224 %tmp163 = insertelement <128 x float> %tmp162, float %tmp102, i32 1
225 %tmp164 = insertelement <128 x float> %tmp163, float %tmp101, i32 2
Dvgpr-spill-emergency-stack-slot-compute.ll344 %tmp163 = insertelement <128 x float> %tmp162, float %tmp74, i32 13
345 %tmp164 = insertelement <128 x float> %tmp163, float %tmp73, i32 14
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2006-10-29-InvokeCrash.ll269 %tmp163 = load double* %tmp162 ; <double> [#uses=1]
270 store double %tmp163, double* %tmp161
D2009-06-15-InvokeCrash.ll271 %tmp163 = load double* %tmp162 ; <double> [#uses=1]
272 store double %tmp163, double* %tmp161
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/
Dlsr-comp-time.ll290 %tmp163 = add i32 %tmp162, 36
291 %tmp164 = urem i32 %tmp163, 101

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