/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | ifcvt-dead-def.ll | 30 %tmp163 = load i16, i16* %tmp162, align 2 33 %tmp166 = icmp eq i16 %tmp163, %tmp165
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/external/llvm/test/CodeGen/ARM/ |
D | ifcvt-dead-def.ll | 30 %tmp163 = load i16, i16* %tmp162, align 2 33 %tmp166 = icmp eq i16 %tmp163, %tmp165
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | 2006-05-01-SchedCausingSpills.ll | 36 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1] 37 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
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D | 2009-03-23-MultiUseSched.ll | 175 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1] 177 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
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D | 2007-08-09-IllegalX86-64Asm.ll | 203 %tmp163 = load i64* %tmp162 ; <i64> [#uses=1] 204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
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/external/llvm/test/CodeGen/X86/ |
D | 2006-05-01-SchedCausingSpills.ll | 37 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1] 38 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
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D | 2009-03-23-MultiUseSched.ll | 176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1] 178 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
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D | 2007-08-09-IllegalX86-64Asm.ll | 203 %tmp163 = load i64, i64* %tmp162 ; <i64> [#uses=1] 204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | 2006-05-01-SchedCausingSpills.ll | 37 %tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1] 38 …%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3…
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D | 2009-03-23-MultiUseSched.ll | 176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1] 178 %tmp165 = add i64 %tmp153, %tmp163 ; <i64> [#uses=1]
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D | 2007-08-09-IllegalX86-64Asm.ll | 203 %tmp163 = load i64, i64* %tmp162 ; <i64> [#uses=1] 204 %tmp164 = add i64 %tmp163, -1 ; <i64> [#uses=2]
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/external/webrtc/webrtc/modules/audio_processing/aecm/ |
D | aecm_core_mips.c | 1257 int16_t tmp16, tmp161, tmp162, tmp163, nrsh1, nrsh2; in ComfortNoise() local 1533 [tmp322] "+r" (tmp322), [tmp323] "+r" (tmp323), [tmp163] "=&r" (tmp163) in ComfortNoise()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | pv.ll | 166 %tmp163 = extractelement <4 x float> %tmp162, i32 2 167 %tmp164 = fmul float %tmp163, %tmp22
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D | si-spill-cf.ll | 191 %tmp163 = fsub float %tmp50, undef 194 %tmp166 = fmul float %tmp163, undef
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D | vgpr-spill-emergency-stack-slot.ll | 226 %tmp163 = insertelement <128 x float> %tmp162, float %tmp102, i32 1 227 %tmp164 = insertelement <128 x float> %tmp163, float %tmp101, i32 2
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D | vgpr-spill-emergency-stack-slot-compute.ll | 362 %tmp163 = insertelement <128 x float> %tmp162, float %tmp74, i32 13 363 %tmp164 = insertelement <128 x float> %tmp163, float %tmp73, i32 14
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D | schedule-regpressure-limit.ll | 172 %tmp163 = load float, float addrspace(3)* %tmp162, align 4 177 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
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D | schedule-ilp.ll | 169 %tmp163 = load float, float addrspace(3)* %tmp162, align 4 174 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
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D | schedule-regpressure-limit3.ll | 171 %tmp163 = load float, float addrspace(3)* %tmp162, align 4 176 %tmp168 = tail call float @llvm.fmuladd.f32(float %tmp163, float %tmp165, float %tmp167)
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/external/llvm/test/CodeGen/AMDGPU/ |
D | si-sgpr-spill.ll | 185 %tmp163 = bitcast i32 %tmp162 to float 186 %tmp164 = fsub float %tmp163, %tmp161 820 %tmp163 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg4, <2 x i32> %arg6) 861 %tmp203 = fsub float -0.000000e+00, %tmp163 1252 %tmp544 = fsub float -0.000000e+00, %tmp163 1342 %tmp602 = fmul float %tmp163, %tmp84 1349 %tmp609 = fmul float %tmp163, %tmp88 1356 %tmp616 = fmul float %tmp163, %tmp92
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D | vgpr-spill-emergency-stack-slot.ll | 224 %tmp163 = insertelement <128 x float> %tmp162, float %tmp102, i32 1 225 %tmp164 = insertelement <128 x float> %tmp163, float %tmp101, i32 2
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D | vgpr-spill-emergency-stack-slot-compute.ll | 344 %tmp163 = insertelement <128 x float> %tmp162, float %tmp74, i32 13 345 %tmp164 = insertelement <128 x float> %tmp163, float %tmp73, i32 14
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/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/ |
D | 2006-10-29-InvokeCrash.ll | 269 %tmp163 = load double* %tmp162 ; <double> [#uses=1] 270 store double %tmp163, double* %tmp161
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D | 2009-06-15-InvokeCrash.ll | 271 %tmp163 = load double* %tmp162 ; <double> [#uses=1] 272 store double %tmp163, double* %tmp161
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/ |
D | lsr-comp-time.ll | 290 %tmp163 = add i32 %tmp162, 36 291 %tmp164 = urem i32 %tmp163, 101
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