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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dapint-cast.ll8 %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1]
9 ; CHECK: %tmp21 = lshr i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
21 %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1]
22 ; CHECK: %tmp21 = lshr i167 %a, 9
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
D2008-01-21-MulTrunc.ll7 %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
8 ; CHECK: %tmp21 = lshr i16 %a, 8
11 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
12 ; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
/external/llvm/test/Transforms/InstCombine/
Dapint-cast.ll8 %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1]
9 ; CHECK: %tmp21 = lshr i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
21 %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1]
22 ; CHECK: %tmp21 = lshr i167 %a, 9
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
D2008-01-21-MulTrunc.ll7 %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
8 ; CHECK: %tmp21 = lshr i16 %a, 8
11 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
12 ; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dapint-cast.ll8 %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1]
9 ; CHECK: %tmp21 = lshr i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
21 %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1]
22 ; CHECK: %tmp21 = lshr i167 %a, 9
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
D2008-01-21-MulTrunc.ll7 %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
8 ; CHECK: %tmp21 = lshr i16 %a, 8
11 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
12 ; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
/external/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll28 %tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
29 %tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 96)
30 %tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 100)
31 %tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 104)
32 %tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 112)
33 %tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 116)
34 %tmp27 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 120)
35 %tmp28 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 128)
36 %tmp29 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 132)
37 %tmp30 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 140)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll30 %tmp21 = load <4 x i32>, <4 x i32> addrspace(4)* %tmp, !tbaa !0
31 %tmp22 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 96)
32 %tmp23 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 100)
33 %tmp24 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 104)
34 %tmp25 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 112)
35 %tmp26 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 116)
36 %tmp27 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 120)
37 %tmp28 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 128)
38 %tmp29 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 132)
39 %tmp30 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp21, i32 140)
[all …]
Dsmrd.ll113 %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 16)
114 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp21, float %tmp21, float %tmp21, float %tmp…
127 %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 1020)
128 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp21, float %tmp21, float %tmp21, float %tmp…
144 %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 1024)
145 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp21, float %tmp21, float %tmp21, float %tmp…
159 %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 1048572)
160 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp21, float %tmp21, float %tmp21, float %tmp…
174 %tmp21 = call float @llvm.SI.load.const.v4i32(<4 x i32> %tmp20, i32 1048576)
175 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp21, float %tmp21, float %tmp21, float %tmp…
Dwait.ll31 %tmp21 = extractelement <4 x float> %tmp18, i32 2
33 …call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %tmp19, float %tmp20, float %tmp21, float %tm…
64 …%tmp21 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %tmp19.cast, i32 %tmp20,…
65 %tmp22 = extractelement <4 x float> %tmp21, i32 0
66 %tmp23 = extractelement <4 x float> %tmp21, i32 1
67 %tmp24 = extractelement <4 x float> %tmp21, i32 2
68 %tmp25 = extractelement <4 x float> %tmp21, i32 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IRCE/
Dclamp.ll17 %tmp21 = zext i32 %length.i167 to i64
30 ; CHECK-NEXT: %tmp43 = icmp ult i64 %indvars.iv.next467, %tmp21
31 ; CHECK-NEXT: [[C0:%[^ ]+]] = icmp ugt i64 %tmp21, 1
32 ; CHECK-NEXT: %exit.mainloop.at = select i1 [[C0]], i64 %tmp21, i64 1
38 %tmp43 = icmp ult i64 %indvars.iv.next467, %tmp21
43 ; CHECK: %tmp56 = icmp ult i64 %indvars.iv.next, %tmp21
51 %tmp56 = icmp ult i64 %indvars.iv.next, %tmp21
61 %tmp99 = icmp ult i64 %indvars.iv750, %tmp21
/external/llvm/test/CodeGen/PowerPC/
Drlwimi3.ll18 %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
19 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
20 %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Drlwimi3.ll18 %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
19 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
20 %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Drlwimi3.ll17 %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
18 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
19 %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
/external/llvm/test/Transforms/NaryReassociate/
Dpr24301.ll9 %tmp21 = add i32 119, %tmp4
11 %tmp23 = add i32 %tmp21, -128
12 ; CHECK: %tmp23 = add i32 %tmp21, -128
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/NaryReassociate/
Dpr24301.ll10 %tmp21 = add i32 119, %tmp4
12 %tmp23 = add i32 %tmp21, -128
13 ; CHECK: %tmp23 = add i32 %tmp21, -128
/external/llvm/test/CodeGen/Generic/
Di128-addsub.ll16 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
17 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
35 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
36 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/
Di128-addsub.ll16 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
17 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
35 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
36 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Di128-addsub.ll16 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
17 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
35 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
36 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
/external/libjpeg-turbo/
Djidctint.c1078 JLONG tmp20, tmp21, tmp22, tmp23, tmp24; in jpeg_idct_10x10() local
1119 tmp21 = tmp11 + tmp13; in jpeg_idct_10x10()
1153 wsptr[8 * 1] = (int)RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_10x10()
1154 wsptr[8 * 8] = (int)RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_10x10()
1191 tmp21 = tmp11 + tmp13; in jpeg_idct_10x10()
1229 outptr[1] = range_limit[(int)RIGHT_SHIFT(tmp21 + tmp11, in jpeg_idct_10x10()
1232 outptr[8] = range_limit[(int)RIGHT_SHIFT(tmp21 - tmp11, in jpeg_idct_10x10()
1273 JLONG tmp20, tmp21, tmp22, tmp23, tmp24, tmp25; in jpeg_idct_11x11() local
1307 tmp21 = tmp20 + tmp23 + tmp25 - in jpeg_idct_11x11()
1345 wsptr[8 * 1] = (int)RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_11x11()
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2009-01-19-UnconditionalTrappingConstantExpr.ll7 define i32 @test(i32 %tmp21, i32 %tmp24) {
8 %tmp25 = icmp sle i32 %tmp21, %tmp24
21 define i32 @test2(i32 %tmp21, i32 %tmp24, i1 %tmp34) {
/external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/
Daddsub-i128.ll19 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
20 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
38 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
39 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/ScalarEvolution/
Dtruncate.ll44 %tmp21 = trunc i64 %tmp20 to i32
45 %tmp22 = icmp eq i32 %tmp21, 0
92 %tmp21 = phi i64 [ 0, %bb ], [ %tmp24, %bb36 ]
98 %tmp29 = icmp ult i64 %tmp21, 1048576
105 %tmp24 = add nuw i64 %tmp21, 1
/external/llvm/test/Transforms/SimplifyCFG/
D2009-01-19-UnconditionalTrappingConstantExpr.ll12 define i32 @test(i32 %tmp21, i32 %tmp24) {
13 %tmp25 = icmp sle i32 %tmp21, %tmp24
31 define i32 @test2(i32 %tmp21, i32 %tmp24, i1 %tmp34) {
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dmmx-arith.ll19 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> […
20 store x86_mmx %tmp21, x86_mmx* %A
22 %tmp21a = bitcast x86_mmx %tmp21 to <8 x i8>
79 %tmp21 = load x86_mmx* %B ; <x86_mmx> [#uses=1]
81 %tmp21a = bitcast x86_mmx %tmp21 to <2 x i32>
114 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> […
115 store x86_mmx %tmp21, x86_mmx* %A
117 %tmp21a = bitcast x86_mmx %tmp21 to <4 x i16>
175 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> […
176 store x86_mmx %tmp21, x86_mmx* %A
[all …]

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