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Searched refs:tmp322 (Results 1 – 25 of 25) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
D2007-10-12-Crash.ll16 %tmp322 = bitcast %struct.Ray* %tmp3 to %struct.Vec* ; <%struct.Vec*> [#uses=1]
17 %tmp322.0 = getelementptr %struct.Vec, %struct.Vec* %tmp322, i32 0, i32 0 ; <double*> [#uses=1]
18 store double 0.000000e+00, double* %tmp322.0
/external/llvm/test/Transforms/InstCombine/
D2007-10-12-Crash.ll16 %tmp322 = bitcast %struct.Ray* %tmp3 to %struct.Vec* ; <%struct.Vec*> [#uses=1]
17 %tmp322.0 = getelementptr %struct.Vec, %struct.Vec* %tmp322, i32 0, i32 0 ; <double*> [#uses=1]
18 store double 0.000000e+00, double* %tmp322.0
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
D2007-10-12-Crash.ll16 %tmp322 = bitcast %struct.Ray* %tmp3 to %struct.Vec* ; <%struct.Vec*> [#uses=1]
17 %tmp322.0 = getelementptr %struct.Vec* %tmp322, i32 0, i32 0 ; <double*> [#uses=1]
18 store double 0.000000e+00, double* %tmp322.0
/external/webrtc/webrtc/modules/audio_processing/aecm/
Daecm_core_mips.c1259 int32_t tmp322, tmp323, *tmp1; in ComfortNoise() local
1504 tmp322 = WebRtcAecm_kCosTable[tmp161]; in ComfortNoise()
1515 [tmp322] "=&r" (tmp322), [tmp323] "=&r" (tmp323) in ComfortNoise()
1533 [tmp322] "+r" (tmp322), [tmp323] "+r" (tmp323), [tmp163] "=&r" (tmp163) in ComfortNoise()
1540 uReal[i + 1] = (int16_t)tmp322; in ComfortNoise()
/external/llvm/test/CodeGen/X86/
Dragreedy-last-chance-recoloring.ll154 %tmp322 = xor i16 %tmp309, 14953
155 %tmp323 = add i16 0, %tmp322
Dlarge-gep-chain.ll344 %tmp322 = getelementptr inbounds float, float* %tmp321, i64 1
345 %tmp323 = getelementptr inbounds float, float* %tmp322, i64 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dragreedy-last-chance-recoloring.ll154 %tmp322 = xor i16 %tmp309, 14953
155 %tmp323 = add i16 0, %tmp322
Dlarge-gep-chain.ll344 %tmp322 = getelementptr inbounds float, float* %tmp321, i64 1
345 %tmp323 = getelementptr inbounds float, float* %tmp322, i64 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dsi-spill-cf.ll480 %tmp322 = call float @llvm.minnum.f32(float %tmp319, float %tmp320)
481 %tmp323 = call float @llvm.minnum.f32(float %tmp322, float %tmp321)
Dvgpr-spill-emergency-stack-slot.ll87 %tmp62 = phi float [ 0.000000e+00, %bb ], [ %tmp322, %bb157 ]
385 %tmp322 = extractelement <128 x float> %tmp290, i32 31
Dvgpr-spill-emergency-stack-slot-compute.ll96 %tmp34 = phi float [ 0.000000e+00, %bb ], [ %tmp322, %bb145 ]
521 %tmp322 = extractelement <128 x float> %tmp278, i32 43
Dbig_alu.ll349 %tmp322 = fadd float %tmp321, %tmp316
352 %tmp325 = insertelement <4 x float> %tmp324, float %tmp322, i32 2
356 %tmp329 = insertelement <4 x float> %tmp328, float %tmp322, i32 2
362 %tmp335 = fmul float %tmp322, %tmp332
Dschedule-regpressure-limit.ll331 %tmp322 = tail call float @llvm.fmuladd.f32(float %tmp317, float %tmp319, float %tmp321)
548 store float %tmp322, float addrspace(1)* %tmp493, align 4
Dschedule-ilp.ll328 %tmp322 = tail call float @llvm.fmuladd.f32(float %tmp317, float %tmp319, float %tmp321)
545 store float %tmp322, float addrspace(1)* %tmp493, align 4
Dschedule-regpressure-limit3.ll330 %tmp322 = tail call float @llvm.fmuladd.f32(float %tmp317, float %tmp319, float %tmp321)
547 store float %tmp322, float addrspace(1)* %tmp493, align 4
Dsi-sgpr-spill.ll404 %tmp322 = fmul float %tmp298, %tmp25
405 %tmp323 = fadd float %tmp322, %tmp319
1126 %tmp322 = fmul float %tmp312, %tmp58
1131 %tmp327 = fadd float %tmp326, %tmp322
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2006-10-29-InvokeCrash.ll449 %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1]
450 %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1]
D2009-06-15-InvokeCrash.ll451 %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1]
452 %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1]
/external/llvm/test/CodeGen/AMDGPU/
Dvgpr-spill-emergency-stack-slot.ll85 %tmp62 = phi float [ 0.000000e+00, %bb ], [ %tmp322, %bb157 ]
383 %tmp322 = extractelement <128 x float> %tmp290, i32 31
Dvgpr-spill-emergency-stack-slot-compute.ll78 %tmp34 = phi float [ 0.000000e+00, %bb ], [ %tmp322, %bb145 ]
503 %tmp322 = extractelement <128 x float> %tmp278, i32 43
Dbig_alu.ll343 %tmp322 = fadd float %tmp321, %tmp316
346 %tmp325 = insertelement <4 x float> %tmp324, float %tmp322, i32 2
350 %tmp329 = insertelement <4 x float> %tmp328, float %tmp322, i32 2
356 %tmp335 = fmul float %tmp322, %tmp332
Dsi-sgpr-spill.ll373 %tmp322 = fmul float %tmp298, %tmp25
374 %tmp323 = fadd float %tmp322, %tmp319
998 %tmp322 = fmul float %tmp312, %tmp58
1003 %tmp327 = fadd float %tmp326, %tmp322
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/
Dlsr-comp-time.ll491 %tmp322 = or i64 %tmp312, 2
492 %tmp323 = trunc i64 %tmp322 to i32
495 … getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* %tmp18, i64 0, i64 0, i64 %tmp322
/external/llvm/test/CodeGen/ARM/
Dthumb-big-stack.ll2038 %tmp322 = load <4 x float>, <4 x float>* undef, align 16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dthumb-big-stack.ll2038 %tmp322 = load <4 x float>, <4 x float>* undef, align 16