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Searched refs:tmp323 (Results 1 – 20 of 20) sorted by relevance

/external/webrtc/webrtc/modules/audio_processing/aecm/
Daecm_core_mips.c1259 int32_t tmp322, tmp323, *tmp1; in ComfortNoise() local
1505 tmp323 = WebRtcAecm_kSinTable[tmp161]; in ComfortNoise()
1515 [tmp322] "=&r" (tmp322), [tmp323] "=&r" (tmp323) in ComfortNoise()
1533 [tmp322] "+r" (tmp322), [tmp323] "+r" (tmp323), [tmp163] "=&r" (tmp163) in ComfortNoise()
1541 uImag[i + 1] = (int16_t)tmp323; in ComfortNoise()
/external/llvm/test/CodeGen/X86/
Dragreedy-last-chance-recoloring.ll155 %tmp323 = add i16 0, %tmp322
157 %tmp325 = xor i16 %tmp324, %tmp323
Dlarge-gep-chain.ll345 %tmp323 = getelementptr inbounds float, float* %tmp322, i64 1
346 %tmp324 = getelementptr inbounds float, float* %tmp323, i64 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dragreedy-last-chance-recoloring.ll155 %tmp323 = add i16 0, %tmp322
157 %tmp325 = xor i16 %tmp324, %tmp323
Dlarge-gep-chain.ll345 %tmp323 = getelementptr inbounds float, float* %tmp322, i64 1
346 %tmp324 = getelementptr inbounds float, float* %tmp323, i64 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dsi-spill-cf.ll481 %tmp323 = call float @llvm.minnum.f32(float %tmp322, float %tmp321)
485 %tmp327 = fcmp olt float undef, %tmp323
Dvgpr-spill-emergency-stack-slot.ll86 %tmp61 = phi float [ 0.000000e+00, %bb ], [ %tmp323, %bb157 ]
386 %tmp323 = extractelement <128 x float> %tmp290, i32 32
Dvgpr-spill-emergency-stack-slot-compute.ll95 %tmp33 = phi float [ 0.000000e+00, %bb ], [ %tmp323, %bb145 ]
522 %tmp323 = extractelement <128 x float> %tmp278, i32 44
Dschedule-regpressure-limit.ll332 %tmp323 = getelementptr inbounds float, float addrspace(3)* %arg, i32 185
333 %tmp324 = load float, float addrspace(3)* %tmp323, align 4
Dschedule-ilp.ll329 %tmp323 = getelementptr inbounds float, float addrspace(3)* %arg, i32 185
330 %tmp324 = load float, float addrspace(3)* %tmp323, align 4
Dschedule-regpressure-limit3.ll331 %tmp323 = getelementptr inbounds float, float addrspace(3)* %arg, i32 185
332 %tmp324 = load float, float addrspace(3)* %tmp323, align 4
Dsi-sgpr-spill.ll405 %tmp323 = fadd float %tmp322, %tmp319
410 %tmp328 = fadd float %tmp278, %tmp323
1127 %tmp323 = fmul float %tmp312, %tmp59
1133 %tmp329 = fadd float %tmp328, %tmp323
Dbig_alu.ll350 %tmp323 = insertelement <4 x float> undef, float %tmp318, i32 0
351 %tmp324 = insertelement <4 x float> %tmp323, float %tmp320, i32 1
/external/llvm/test/CodeGen/AMDGPU/
Dvgpr-spill-emergency-stack-slot.ll84 %tmp61 = phi float [ 0.000000e+00, %bb ], [ %tmp323, %bb157 ]
384 %tmp323 = extractelement <128 x float> %tmp290, i32 32
Dvgpr-spill-emergency-stack-slot-compute.ll77 %tmp33 = phi float [ 0.000000e+00, %bb ], [ %tmp323, %bb145 ]
504 %tmp323 = extractelement <128 x float> %tmp278, i32 44
Dsi-sgpr-spill.ll374 %tmp323 = fadd float %tmp322, %tmp319
379 %tmp328 = fadd float %tmp278, %tmp323
999 %tmp323 = fmul float %tmp312, %tmp59
1005 %tmp329 = fadd float %tmp328, %tmp323
Dbig_alu.ll344 %tmp323 = insertelement <4 x float> undef, float %tmp318, i32 0
345 %tmp324 = insertelement <4 x float> %tmp323, float %tmp320, i32 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/
Dlsr-comp-time.ll492 %tmp323 = trunc i64 %tmp322 to i32
493 %tmp324 = add i32 %tmp323, 28
/external/llvm/test/CodeGen/ARM/
Dthumb-big-stack.ll2046 %tmp323 = load <4 x float>, <4 x float>* undef, align 16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dthumb-big-stack.ll2046 %tmp323 = load <4 x float>, <4 x float>* undef, align 16