Searched refs:tmp_lo (Results 1 – 4 of 4) sorted by relevance
/external/gemmlowp/internal/ |
D | output_msa.h | 73 v4i32 tmp_lo = __builtin_msa_sat_s_w(input.reg[0], 8); 77 tmp_lo = reinterpret_cast<v4i32>(__builtin_msa_pckev_h( 78 reinterpret_cast<v8i16>(tmp_hi), reinterpret_cast<v8i16>(tmp_lo))); 81 v8i16 signs = __builtin_msa_srai_h(reinterpret_cast<v8i16>(tmp_lo), 15); 84 reinterpret_cast<v16u8>(signs), reinterpret_cast<v16u8>(tmp_lo), 0)); 86 tmp_lo = reinterpret_cast<v4i32>(__builtin_msa_pckev_b( 89 output.reg[0] = __builtin_msa_copy_s_w(tmp_lo, 0); 90 output.reg[1] = __builtin_msa_copy_s_w(tmp_lo, 1);
|
/external/webp/src/dsp/ |
D | enc_sse41.c | 284 const __m128i tmp_lo = _mm_shuffle_epi8(out0, kCst_lo); in DoQuantizeBlock_SSE41() local 290 const __m128i out_z0 = _mm_or_si128(tmp_lo, tmp_8); in DoQuantizeBlock_SSE41()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.td | 2856 "{{ .reg .b16 \t%tmp_lo;\n\t" 2857 " mov.b32 \t{%tmp_lo, $dst}, $src; }}",
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/ |
D | f16x2-instructions.ll | 38 ; CHECK: mov.b32 {%tmp_lo, [[R:%h[0-9]+]]}, [[A]];
|