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Searched refs:tmp_val (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dqe_io.c22 u32 tmp_val; in qe_config_iopin() local
32 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \ in qe_config_iopin()
37 out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val); in qe_config_iopin()
38 out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val); in qe_config_iopin()
40 out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val); in qe_config_iopin()
41 out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); in qe_config_iopin()
48 tmp_val = in_be32(&par_io[port].cpodr); in qe_config_iopin()
50 out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val); in qe_config_iopin()
52 out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val); in qe_config_iopin()
55 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? in qe_config_iopin()
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/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dqe_io.c21 u32 tmp_val; in qe_config_iopin() local
30 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \ in qe_config_iopin()
35 out_be32(&par_io->ioport[port].dir2, ~pin_2bit_mask & tmp_val); in qe_config_iopin()
36 out_be32(&par_io->ioport[port].dir2, pin_2bit_dir | tmp_val); in qe_config_iopin()
38 out_be32(&par_io->ioport[port].dir1, ~pin_2bit_mask & tmp_val); in qe_config_iopin()
39 out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val); in qe_config_iopin()
46 tmp_val = in_be32(&par_io->ioport[port].podr); in qe_config_iopin()
48 out_be32(&par_io->ioport[port].podr, pin_1bit_mask | tmp_val); in qe_config_iopin()
50 out_be32(&par_io->ioport[port].podr, ~pin_1bit_mask & tmp_val); in qe_config_iopin()
54 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? in qe_config_iopin()
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/external/u-boot/board/freescale/mpc8610hpcd/
Dmpc8610hpcd.c41 u8 tmp_val, version; in misc_init_r() local
45 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r()
46 out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80); in misc_init_r()
51 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r()
52 out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf); in misc_init_r()
59 tmp_val = 0xBF; in misc_init_r()
60 i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); in misc_init_r()
62 tmp_val = 0; in misc_init_r()
63 i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); in misc_init_r()
64 debug("DVI Encoder Read: 0x%02x\n", tmp_val); in misc_init_r()
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/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_debug.c906 u32 tmp_val = 0, if_id = 0, pup_id = 0; in ddr3_tip_access_atr() local
1214 tmp_val = flag_id - 0x320; in ddr3_tip_access_atr()
1215 *ptr = (u32 *)&(clamp_tbl[tmp_val]); in ddr3_tip_access_atr()