Searched refs:tshsl (Results 1 – 12 of 12) sorted by relevance
/external/u-boot/arch/arm/dts/ |
D | socfpga_cyclone5_vining_fpga.dts | 81 cdns,tshsl-ns = <50>; 97 cdns,tshsl-ns = <50>;
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D | stv0991.dts | 49 cdns,tshsl-ns = <50>;
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D | socfpga_cyclone5_sr1500.dts | 94 cdns,tshsl-ns = <50>;
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D | socfpga_cyclone5_sockit.dts | 86 cdns,tshsl-ns = <50>;
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D | keystone-k2g-ice.dts | 49 cdns,tshsl-ns = <500>;
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D | socfpga_cyclone5_socrates.dts | 76 cdns,tshsl-ns = <50>;
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D | socfpga_arria5_socdk.dts | 96 cdns,tshsl-ns = <50>;
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D | socfpga_cyclone5_is1.dts | 95 cdns,tshsl-ns = <50>;
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D | socfpga_cyclone5_socdk.dts | 106 cdns,tshsl-ns = <50>;
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D | keystone-k2g-evm.dts | 79 cdns,tshsl-ns = <392>;
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/external/u-boot/drivers/spi/ |
D | cadence_qspi_apb.c | 343 unsigned int tshsl, tchsh, tslch, tsd2d; in cadence_qspi_apb_delay() local 359 tshsl = DIV_ROUND_UP(tshsl_ns, ref_clk_ns); in cadence_qspi_apb_delay() 364 reg = ((tshsl & CQSPI_REG_DELAY_TSHSL_MASK) in cadence_qspi_apb_delay()
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/external/u-boot/doc/device-tree-bindings/spi/ |
D | spi-cadence.txt | 21 - cdns,tshsl-ns : Added delay in master reference clocks (ref_clk) for
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