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/external/llvm/test/CodeGen/ARM/
Dvsel.ll6 %tst1 = icmp sgt i32 %lhs32, %rhs32
7 %val1 = select i1 %tst1, float %a, float %b
15 %tst1 = icmp sgt i32 %lhs32, %rhs32
16 %val1 = select i1 %tst1, double %a, double %b
24 %tst1 = icmp sge i32 %lhs32, %rhs32
25 %val1 = select i1 %tst1, float %a, float %b
33 %tst1 = icmp sge i32 %lhs32, %rhs32
34 %val1 = select i1 %tst1, double %a, double %b
42 %tst1 = icmp eq i32 %lhs32, %rhs32
43 %val1 = select i1 %tst1, float %a, float %b
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvsel.ll6 %tst1 = icmp sgt i32 %lhs32, %rhs32
7 %val1 = select i1 %tst1, float %a, float %b
15 %tst1 = icmp sgt i32 %lhs32, %rhs32
16 %val1 = select i1 %tst1, double %a, double %b
24 %tst1 = icmp sge i32 %lhs32, %rhs32
25 %val1 = select i1 %tst1, float %a, float %b
33 %tst1 = icmp sge i32 %lhs32, %rhs32
34 %val1 = select i1 %tst1, double %a, double %b
42 %tst1 = icmp eq i32 %lhs32, %rhs32
43 %val1 = select i1 %tst1, float %a, float %b
[all …]
Ddarwin-tls-preserved.ll7 define i32 @test_regs_preserved(i32* %ptr1, i32* %ptr2, i1 %tst1) {
13 br i1 %tst1, label %get_tls, label %done
/external/llvm/test/Transforms/InstCombine/
Dicmp-logical.ll11 %tst1 = icmp ne i32 %mask1, 0
16 %res = and i1 %tst1, %tst2
28 %tst1 = icmp eq i32 %mask1, 0
33 %res = or i1 %tst1, %tst2
45 %tst1 = icmp ne i32 %mask1, 7
50 %res = and i1 %tst1, %tst2
62 %tst1 = icmp eq i32 %mask1, 7
67 %res = or i1 %tst1, %tst2
79 %tst1 = icmp ne i32 %mask1, %A
84 %res = and i1 %tst1, %tst2
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dcond-sel.ll10 %tst1 = icmp ugt i32 %lhs32, %rhs32
11 %val1 = select i1 %tst1, i32 42, i32 52
32 %tst1 = fcmp one float %lhs32, %rhs32
35 %val1 = select i1 %tst1, i32 42, i32 52
62 %tst1 = icmp ugt i32 %lhs32, %rhs32
64 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
102 %tst1 = icmp ugt i32 %lhs32, %rhs32
104 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
141 %tst1 = icmp ugt i32 %lhs32, %rhs32
142 %val1 = select i1 %tst1, i32 0, i32 -1
[all …]
Dfcmp.ll8 %tst1 = fcmp oeq float %a, %b
9 br i1 %tst1, label %end, label %t2
47 %tst1 = fcmp oeq double %a, %b
48 br i1 %tst1, label %end, label %t2
Dcompare-branch.ll10 %tst1 = icmp eq i32 %val1, 0
11 br i1 %tst1, label %end, label %test2, !prof !1
Dfp-cond-sel.ll12 %tst1 = icmp ugt i32 %lhs32, %rhs32
13 %val1 = select i1 %tst1, float 0.0, float 1.0
Darm64-ands-bad-peephole.ll8 ; CHECK-LABEL: tst1:
11 define void @tst1(i1 %tst, i32 %true) {
Dtst-br.ll22 %tst1 = icmp ne i32 %tbit1, 0
23 br i1 %tst1, label %test2, label %end1
Daddsub-shifted.ll197 %tst1 = icmp uge i32 %lhs32, %shift1
198 br i1 %tst1, label %t2, label %end
250 %tst1 = icmp uge i32 %lhs32, %val1
251 br i1 %tst1, label %t2, label %end
/external/llvm/test/CodeGen/AArch64/
Dcond-sel.ll10 %tst1 = icmp ugt i32 %lhs32, %rhs32
11 %val1 = select i1 %tst1, i32 42, i32 52
32 %tst1 = fcmp one float %lhs32, %rhs32
35 %val1 = select i1 %tst1, i32 42, i32 52
62 %tst1 = icmp ugt i32 %lhs32, %rhs32
64 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
102 %tst1 = icmp ugt i32 %lhs32, %rhs32
104 %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
141 %tst1 = icmp ugt i32 %lhs32, %rhs32
142 %val1 = select i1 %tst1, i32 0, i32 -1
[all …]
Dfcmp.ll8 %tst1 = fcmp oeq float %a, %b
9 br i1 %tst1, label %end, label %t2
47 %tst1 = fcmp oeq double %a, %b
48 br i1 %tst1, label %end, label %t2
Dcompare-branch.ll10 %tst1 = icmp eq i32 %val1, 0
11 br i1 %tst1, label %end, label %test2
Dfp-cond-sel.ll12 %tst1 = icmp ugt i32 %lhs32, %rhs32
13 %val1 = select i1 %tst1, float 0.0, float 1.0
Darm64-ands-bad-peephole.ll8 ; CHECK-LABEL: tst1:
11 define void @tst1(i1 %tst, i32 %true) {
Dtst-br.ll22 %tst1 = icmp ne i32 %tbit1, 0
23 br i1 %tst1, label %test2, label %end1
/external/fonttools/Tests/feaLib/data/
Dbug568.fea3 feature tst1 {
6 } tst1;
Dlookup.fea8 feature tst1 {
10 } tst1;
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dicmp-logical.ll11 %tst1 = icmp ne i32 %mask1, 0
14 %res = and i1 %tst1, %tst2
25 %tst1 = icmp eq i32 %mask1, 0
28 %res = or i1 %tst1, %tst2
39 %tst1 = icmp ne i32 %mask1, 7
42 %res = and i1 %tst1, %tst2
53 %tst1 = icmp eq i32 %mask1, 7
56 %res = or i1 %tst1, %tst2
67 %tst1 = icmp ne i32 %mask1, %A
70 %res = and i1 %tst1, %tst2
[all …]
/external/llvm/test/CodeGen/X86/
Dsse-fcopysign.ll8 define float @tst1(float %a, float %b) {
9 ; X32-LABEL: @tst1
18 ; X64-LABEL: @tst1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dsse-fcopysign.ll9 define float @tst1(float %a, float %b) nounwind {
10 ; X32-LABEL: tst1:
21 ; X64-LABEL: tst1:
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dsse-fcopysign.ll3 define float @tst1(float %a, float %b) {
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Dbranch.ll46 %tst1 = icmp eq i32 %val1, %a
47 br i1 %tst1, label %end, label %test2
Dselect-cc.ll60 %tst1 = icmp eq i32 %a, %val1
61 %val2 = select i1 %tst1, i32 %a, i32 %val1

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