Searched refs:txr (Results 1 – 9 of 9) sorted by relevance
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state_init.c | 586 ALLOC_STATE_IDX( txr[0], txr0, TXR_STATE_SIZE, "TXR/txr-0", 0, 0 ); in radeonInitState()
587 ALLOC_STATE_IDX( txr[1], txr1, TXR_STATE_SIZE, "TXR/txr-1", 0, 1 ); in radeonInitState()
588 ALLOC_STATE_IDX( txr[2], txr2, TXR_STATE_SIZE, "TXR/txr-2", 0, 2 ); in radeonInitState()
620 rmesa->hw.txr[0].cmd[TXR_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TEX_SIZE_0); in radeonInitState()
621 rmesa->hw.txr[1].cmd[TXR_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TEX_SIZE_1); in radeonInitState()
622 rmesa->hw.txr[2].cmd[TXR_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_TEX_SIZE_2); in radeonInitState()
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| D | radeon_context.h | 326 struct radeon_state_atom txr[3]; /* for NPOT */ member
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| D | radeon_blit.c | 426 r100->hw.txr[0].dirty = GL_TRUE; in r100_blit()
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| D | radeon_texstate.c | 735 uint32_t *txr_cmd = &rmesa->hw.txr[unit].cmd[TXR_CMD_0]; in import_tex_obj_state()
738 RADEON_STATECHANGE( rmesa, txr[unit] ); in import_tex_obj_state()
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| D | radeon_ioctl.c | 79 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.txr[i]); in radeonSetUpAtomList()
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| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 6cb67b54a38f312ccb91efa3d8e35b06.0001efed.honggfuzz.cov | 6705 B~2;��txr���.����1��{ȑ�c��i�k{Ov����!F����2}��Xml��J�O�{цβx�� �т�W�a��T|�c$�u���E���IM)y�K�8…
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| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | iso-639-3_Name_Index.tab | 6930 txr Tartessian Tartessian
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| D | iso-639-3.tab | 6668 txr I A Tartessian
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| D | language-subtag-registry | 35844 Subtag: txr
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