Searched refs:uabd (Results 1 – 25 of 49) sorted by relevance
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10 uabd z31.b, p7/m, z31.b, z31.b label16 uabd z31.h, p7/m, z31.h, z31.h label22 uabd z31.s, p7/m, z31.s, z31.s label28 uabd z31.d, p7/m, z31.d, z31.d label44 uabd z4.d, p7/m, z4.d, z31.d label56 uabd z4.d, p7/m, z4.d, z31.d label
3 uabd z0.b, p8/m, z0.b, z0.b label
3 declare <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8>, <8 x i8>)8 %abd = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %lhs, <8 x i8> %rhs)9 ; CHECK: uabd v0.8b, v0.8b, v1.8b15 %abd = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %lhs, <8 x i8> %rhs)36 declare <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8>, <16 x i8>)41 %abd = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %lhs, <16 x i8> %rhs)42 ; CHECK: uabd v0.16b, v0.16b, v1.16b48 %abd = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %lhs, <16 x i8> %rhs)69 declare <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16>, <4 x i16>)74 %abd = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %lhs, <4 x i16> %rhs)[all …]
75 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)85 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)95 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)108 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)120 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)297 ;CHECK: uabd.8b300 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)306 ;CHECK: uabd.16b309 %tmp3 = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)[all …]
29 declare <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32>, <2 x i32>)31 declare <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16>, <4 x i16>)33 declare <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8>, <8 x i8>)1104 %vabd.i.i = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b)1113 %vabd2.i.i = tail call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %a, <4 x i16> %b)1122 %vabd2.i.i = tail call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %a, <2 x i32> %b)1161 %vabd.i.i.i = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %b, <8 x i8> %c)1171 %vabd2.i.i.i = tail call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %b, <4 x i16> %c)1181 %vabd2.i.i.i = tail call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %b, <2 x i32> %c)1226 …%vabd.i.i.i = tail call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %shuffle.i.i, <8 x i8> %shu…[all …]
75 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)85 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)95 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)108 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)120 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)319 ;CHECK: uabd.8b322 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)328 ;CHECK: uabd.16b331 %tmp3 = call <16 x i8> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)[all …]
40 uabd v0.8b, v1.8b, v2.8b41 uabd v0.16b, v1.16b, v2.16b42 uabd v0.4h, v1.4h, v2.4h43 uabd v0.8h, v1.8h, v2.8h44 uabd v0.2s, v1.2s, v2.2s45 uabd v0.4s, v1.4s, v2.4s
357 uabd.8b v0, v0, v0428 ; CHECK: uabd.8b v0, v0, v0 ; encoding: [0x00,0x74,0x20,0x2e]
14 0x20,0x74,0x22,0x2e = uabd v0.8b, v1.8b, v2.8b15 0x20,0x74,0x22,0x6e = uabd v0.16b, v1.16b, v2.16b16 0x20,0x74,0x62,0x2e = uabd v0.4h, v1.4h, v2.4h17 0x20,0x74,0x62,0x6e = uabd v0.8h, v1.8h, v2.8h18 0x20,0x74,0xa2,0x2e = uabd v0.2s, v1.2s, v2.2s19 0x20,0x74,0xa2,0x6e = uabd v0.4s, v1.4s, v2.4s
131 uabd v16.4h, v16.4h, v17.4h134 uabd v17.4h, v18.4h, v19.4h154 uabd v0.4s, v0.4s, v2.4s155 uabd v4.4s, v4.4s, v6.4s171 uabd v0.8b, v0.8b, v1.8b200 uabd v0.8b, v0.8b, v1.8b
109 uabd v26.16b, v6.16b , v4.16b //Q13 = ABS(p1 - p0)112 uabd v22.16b, v4.16b , v0.16b //Q11 = ABS(p0 - q0)113 uabd v24.16b, v2.16b , v0.16b //Q12 = ABS(q1 - q0)226 uabd v8.16b, v2.16b , v4.16b //|p0-q0|227 uabd v10.16b, v6.16b , v4.16b //|q1-q0|228 uabd v12.16b, v0.16b , v2.16b //|p1-p0|364 uabd v26.16b, v6.16b , v4.16b //Q13 = ABS(p1 - p0)367 uabd v22.16b, v4.16b , v0.16b //Q11 = ABS(p0 - q0)373 uabd v24.16b, v2.16b , v0.16b //Q12 = ABS(q1 - q0)500 uabd v8.16b, v2.16b , v4.16b //|p0-q0|[all …]
111 uabd v26.16b, v8.16b, v6.16b115 uabd v22.16b, v6.16b, v0.16b117 uabd v24.16b, v2.16b, v0.16b125 uabd v28.16b, v10.16b, v6.16b126 uabd v30.16b, v4.16b, v0.16b265 uabd v12.16b , v4.16b, v6.16b266 uabd v14.16b , v8.16b, v4.16b267 uabd v16.16b , v10.16b, v6.16b277 uabd v22.16b , v14.16b, v4.16b333 uabd v16.16b , v30.16b, v6.16b[all …]
1840 0x~~~~~~~~~~~~~~~~ 6e357492 uabd v18.16b, v4.16b, v21.16b1841 0x~~~~~~~~~~~~~~~~ 2eb076be uabd v30.2s, v21.2s, v16.2s1842 0x~~~~~~~~~~~~~~~~ 2e797788 uabd v8.4h, v28.4h, v25.4h1843 0x~~~~~~~~~~~~~~~~ 6eb5759c uabd v28.4s, v12.4s, v21.4s1844 0x~~~~~~~~~~~~~~~~ 2e3c7613 uabd v19.8b, v16.8b, v28.8b1845 0x~~~~~~~~~~~~~~~~ 6e7d7589 uabd v9.8h, v12.8h, v29.8h
1839 0x~~~~~~~~~~~~~~~~ 6e357492 uabd v18.16b, v4.16b, v21.16b ### {NEON} ###1840 0x~~~~~~~~~~~~~~~~ 2eb076be uabd v30.2s, v21.2s, v16.2s ### {NEON} ###1841 0x~~~~~~~~~~~~~~~~ 2e797788 uabd v8.4h, v28.4h, v25.4h ### {NEON} ###1842 0x~~~~~~~~~~~~~~~~ 6eb5759c uabd v28.4s, v12.4s, v21.4s ### {NEON} ###1843 0x~~~~~~~~~~~~~~~~ 2e3c7613 uabd v19.8b, v16.8b, v28.8b ### {NEON} ###1844 0x~~~~~~~~~~~~~~~~ 6e7d7589 uabd v9.8h, v12.8h, v29.8h ### {NEON} ###
1839 0x~~~~~~~~~~~~~~~~ 6e357492 uabd v18.16b, v4.16b, v21.16b // Needs: NEON1840 0x~~~~~~~~~~~~~~~~ 2eb076be uabd v30.2s, v21.2s, v16.2s // Needs: NEON1841 0x~~~~~~~~~~~~~~~~ 2e797788 uabd v8.4h, v28.4h, v25.4h // Needs: NEON1842 0x~~~~~~~~~~~~~~~~ 6eb5759c uabd v28.4s, v12.4s, v21.4s // Needs: NEON1843 0x~~~~~~~~~~~~~~~~ 2e3c7613 uabd v19.8b, v16.8b, v28.8b // Needs: NEON1844 0x~~~~~~~~~~~~~~~~ 6e7d7589 uabd v9.8h, v12.8h, v29.8h // Needs: NEON
1839 0x~~~~~~~~~~~~~~~~ 6e357492 uabd v18.16b, v4.16b, v21.16b [1;35mNEON[0;m1840 0x~~~~~~~~~~~~~~~~ 2eb076be uabd v30.2s, v21.2s, v16.2s [1;35mNEON[0;m1841 0x~~~~~~~~~~~~~~~~ 2e797788 uabd v8.4h, v28.4h, v25.4h [1;35mNEON[0;m1842 0x~~~~~~~~~~~~~~~~ 6eb5759c uabd v28.4s, v12.4s, v21.4s [1;35mNEON[0;m1843 0x~~~~~~~~~~~~~~~~ 2e3c7613 uabd v19.8b, v16.8b, v28.8b [1;35mNEON[0;m1844 0x~~~~~~~~~~~~~~~~ 6e7d7589 uabd v9.8h, v12.8h, v29.8h [1;35mNEON[0;m
4983 0x~~~~~~~~~~~~~~~~ 6e357492 uabd v18.16b, v4.16b, v21.16b4985 0x~~~~~~~~~~~~~~~~ 2eb076be uabd v30.2s, v21.2s, v16.2s4987 0x~~~~~~~~~~~~~~~~ 2e797788 uabd v8.4h, v28.4h, v25.4h4989 0x~~~~~~~~~~~~~~~~ 6eb5759c uabd v28.4s, v12.4s, v21.4s4991 0x~~~~~~~~~~~~~~~~ 2e3c7613 uabd v19.8b, v16.8b, v28.8b4993 0x~~~~~~~~~~~~~~~~ 6e7d7589 uabd v9.8h, v12.8h, v29.8h
2182 __ uabd(v18.V16B(), v4.V16B(), v21.V16B()); in GenerateTestSequenceNEON() local2183 __ uabd(v30.V2S(), v21.V2S(), v16.V2S()); in GenerateTestSequenceNEON() local2184 __ uabd(v8.V4H(), v28.V4H(), v25.V4H()); in GenerateTestSequenceNEON() local2185 __ uabd(v28.V4S(), v12.V4S(), v21.V4S()); in GenerateTestSequenceNEON() local2186 __ uabd(v19.V8B(), v16.V8B(), v28.V8B()); in GenerateTestSequenceNEON() local2187 __ uabd(v9.V8H(), v12.V8H(), v29.V8H()); in GenerateTestSequenceNEON() local
2434 TEST_NEON(uabd_0, uabd(v0.V8B(), v1.V8B(), v2.V8B()))2435 TEST_NEON(uabd_1, uabd(v0.V16B(), v1.V16B(), v2.V16B()))2436 TEST_NEON(uabd_2, uabd(v0.V4H(), v1.V4H(), v2.V4H()))2437 TEST_NEON(uabd_3, uabd(v0.V8H(), v1.V8H(), v2.V8H()))2438 TEST_NEON(uabd_4, uabd(v0.V2S(), v1.V2S(), v2.V2S()))2439 TEST_NEON(uabd_5, uabd(v0.V4S(), v1.V4S(), v2.V4S()))
11929 "\004trn1\004trn2\003tsb\003tst\004uaba\005uabal\006uabal2\004uabd\005ua"17817 …{ 5307 /* uabd */, AArch64::UABDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4,…17818 …{ 5307 /* uabd */, AArch64::UABDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4,…17819 …{ 5307 /* uabd */, AArch64::UABDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4,…17820 …{ 5307 /* uabd */, AArch64::UABDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Fe…17821 …{ 5307 /* uabd */, AArch64::UABDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Fe…17822 …{ 5307 /* uabd */, AArch64::UABDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Fea…17823 …{ 5307 /* uabd */, AArch64::UABD_ZPmZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_…17824 …{ 5307 /* uabd */, AArch64::UABD_ZPmZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Tie0_…17825 …{ 5307 /* uabd */, AArch64::UABD_ZPmZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_…[all …]