| /external/capstone/suite/MC/AArch64/ |
| D | neon-across.s.cs | 7 0x20,0x38,0x30,0x2e = uaddlv h0, v1.8b
8 0x20,0x38,0x30,0x6e = uaddlv h0, v1.16b
9 0x20,0x38,0x70,0x2e = uaddlv s0, v1.4h
10 0x20,0x38,0x70,0x6e = uaddlv s0, v1.8h
11 0x20,0x38,0xb0,0x6e = uaddlv d0, v1.4s
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-across.s | 21 uaddlv h0, v1.8b
22 uaddlv h0, v1.16b
23 uaddlv s0, v1.4h
24 uaddlv s0, v1.8h
25 uaddlv d0, v1.4s define
|
| D | neon-diagnostics.s | 3743 uaddlv b0, v1.8b
3744 uaddlv b0, v1.16b
3745 uaddlv h0, v1.4h
3746 uaddlv h0, v1.8h
3747 uaddlv s0, v1.2s
3748 uaddlv s0, v1.4s
3749 uaddlv d0, v1.2s define
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-across.s | 21 uaddlv h0, v1.8b
22 uaddlv h0, v1.16b
23 uaddlv s0, v1.4h
24 uaddlv s0, v1.8h
25 uaddlv d0, v1.4s define
|
| D | neon-diagnostics.s | 3683 uaddlv b0, v1.8b
3684 uaddlv b0, v1.16b
3685 uaddlv h0, v1.4h
3686 uaddlv h0, v1.8h
3687 uaddlv s0, v1.2s
3688 uaddlv s0, v1.4s
3689 uaddlv d0, v1.2s define
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-simd-scalar-to-vector.ll | 5 ; CHECK: uaddlv.16b h0, v0
10 ; CHECK-FAST: uaddlv.16b
13 %tmp = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) nounwind
22 declare i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8>) nounwind readnone
|
| D | arm64-neon-across.ll | 61 declare i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32>)
63 declare i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16>)
65 declare i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8>)
73 declare i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16>)
75 declare i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8>)
100 ; CHECK: uaddlv h{{[0-9]+}}, {{v[0-9]+}}.8b
102 %uaddlvv.i = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a)
109 ; CHECK: uaddlv s{{[0-9]+}}, {{v[0-9]+}}.4h
111 %uaddlvv.i = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a)
142 ; CHECK: uaddlv h{{[0-9]+}}, {{v[0-9]+}}.16b
[all …]
|
| D | arm64-popcnt.ll | 10 ; CHECK: uaddlv.8b h0, v0
28 ; CHECK: uaddlv.8b h0, v0
44 ; CHECK: uaddlv.8b h0, v0
|
| D | arm64-vaddlv.ll | 19 %vaddlv.i = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32> %a1) nounwind
23 declare i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32>) nounwind readnone
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-simd-scalar-to-vector.ll | 5 ; CHECK: uaddlv.16b h0, v0
10 ; CHECK-FAST: uaddlv.16b
13 %tmp = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) nounwind
22 declare i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8>) nounwind readnone
|
| D | arm64-neon-across.ll | 61 declare i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32>)
63 declare i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16>)
65 declare i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8>)
73 declare i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16>)
75 declare i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8>)
100 ; CHECK: uaddlv h{{[0-9]+}}, {{v[0-9]+}}.8b
102 %uaddlvv.i = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a)
109 ; CHECK: uaddlv s{{[0-9]+}}, {{v[0-9]+}}.4h
111 %uaddlvv.i = tail call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a)
142 ; CHECK: uaddlv h{{[0-9]+}}, {{v[0-9]+}}.16b
[all …]
|
| D | arm64-popcnt.ll | 10 ; CHECK: uaddlv.8b h0, v0
28 ; CHECK: uaddlv.8b h0, v0
44 ; CHECK: uaddlv.8b h0, v0
|
| D | arm64-vaddlv.ll | 19 %vaddlv.i = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32> %a1) nounwind
23 declare i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32>) nounwind readnone
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 1870 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s
1871 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b
1872 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b
1873 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h
1874 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h
|
| D | log-disasm | 1870 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s
1871 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b
1872 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b
1873 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h
1874 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h
|
| D | log-cpufeatures-custom | 1869 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s ### {NEON} ###
1870 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b ### {NEON} ###
1871 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b ### {NEON} ###
1872 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h ### {NEON} ###
1873 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h ### {NEON} ###
|
| D | log-cpufeatures | 1869 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s // Needs: NEON
1870 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b // Needs: NEON
1871 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b // Needs: NEON
1872 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h // Needs: NEON
1873 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h // Needs: NEON
|
| D | log-cpufeatures-colour | 1869 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s [1;35mNEON[0;m
1870 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b [1;35mNEON[0;m
1871 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b [1;35mNEON[0;m
1872 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h [1;35mNEON[0;m
1873 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h [1;35mNEON[0;m
|
| D | log-all | 5043 0x~~~~~~~~~~~~~~~~ 6eb03adc uaddlv d28, v22.4s
5045 0x~~~~~~~~~~~~~~~~ 6e303a60 uaddlv h0, v19.16b
5047 0x~~~~~~~~~~~~~~~~ 2e303bde uaddlv h30, v30.8b
5049 0x~~~~~~~~~~~~~~~~ 2e703a58 uaddlv s24, v18.4h
5051 0x~~~~~~~~~~~~~~~~ 6e70380a uaddlv s10, v0.8h
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2212 __ uaddlv(d28, v22.V4S()); in GenerateTestSequenceNEON() local
2213 __ uaddlv(h0, v19.V16B()); in GenerateTestSequenceNEON() local
2214 __ uaddlv(h30, v30.V8B()); in GenerateTestSequenceNEON() local
2215 __ uaddlv(s24, v18.V4H()); in GenerateTestSequenceNEON() local
2216 __ uaddlv(s10, v0.V8H()); in GenerateTestSequenceNEON() local
|
| D | test-cpu-features-aarch64.cc | 2452 TEST_NEON(uaddlv_0, uaddlv(h0, v1.V8B()))
2453 TEST_NEON(uaddlv_1, uaddlv(h0, v1.V16B()))
2454 TEST_NEON(uaddlv_2, uaddlv(s0, v1.V4H()))
2455 TEST_NEON(uaddlv_3, uaddlv(s0, v1.V8H()))
2456 TEST_NEON(uaddlv_4, uaddlv(d0, v1.V4S()))
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.h | 343 V(uaddlv, Uaddlv) \
|
| D | simulator-arm64.h | 1614 LogicVRegister uaddlv(VectorFormat vform, LogicVRegister dst,
|
| D | assembler-arm64.h | 1988 void uaddlv(const VRegister& vd, const VRegister& vn);
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 2318 LogicVRegister uaddlv(VectorFormat vform,
|