/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
D | udivrem-change-width.ll | 8 ; CHECK-NEXT: [[DIV:%.*]] = udiv i8 %a, %b 13 %udiv = udiv i32 %za, %zb 14 %conv3 = trunc i32 %udiv to i8 20 ; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i8> %a, %b 25 %udiv = udiv <2 x i32> %za, %zb 26 %conv3 = trunc <2 x i32> %udiv to <2 x i8> 37 %udiv = urem i32 %za, %zb 38 %conv3 = trunc i32 %udiv to i8 49 %udiv = urem <2 x i32> %za, %zb 50 %conv3 = trunc <2 x i32> %udiv to <2 x i8> [all …]
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D | compare-udiv.ll | 9 %div = udiv i32 %n, %d 19 %div = udiv <2 x i32> %n, %d 29 %div = udiv i32 64, %d 39 %div = udiv <2 x i32> <i32 64, i32 63>, %d 49 %div = udiv i32 %n, %d 59 %div = udiv <2 x i32> %n, %d 69 %div = udiv i32 64, %d 79 %div = udiv <2 x i32> <i32 64, i32 65>, %d 88 %div = udiv i32 -1, %d 97 %div = udiv <2 x i32> <i32 -1, i32 -1>, %d [all …]
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D | udiv-simplify.ll | 9 %r = udiv i32 %y, -1 18 %r = udiv i32 %y, 3 23 ; The udiv instructions shouldn't be optimized away, and the 29 ; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[G:%.*]] 34 %r = udiv i32 %y, %g 41 ; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[V:%.*]] 46 %r = udiv i32 %y, %v 51 ; The udiv should be simplified according to the rule: 52 ; X udiv (C1 << N), where C1 is `1<<C2` --> X >> (N+C2) 62 %d = udiv i32 %z, zext (i16 shl (i16 1, i16 ptrtoint ([1 x i16]* @b to i16)) to i32) [all …]
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D | 2012-08-28-udiv_ashl.ll | 9 ; CHECK: udiv i32 %x, 400 14 %div1 = udiv i32 %div, 100 26 %div1 = udiv i32 %div, 100 31 ; CHECK: udiv i32 %x, 400 37 ; unsigned inputs), turn this into a udiv. 45 ; CHECK: udiv i80 %x, 400 49 %div1 = udiv i80 %div, 100 55 %div1 = udiv i32 %div, 100
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-mul-div.ll | 218 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 219 %tmp3 = udiv <1 x i8> %A, %B; 225 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 226 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 227 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 228 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 229 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 230 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 231 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 232 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} [all …]
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D | rem_crash.ll | 5 %0 = udiv i8 %x, 10 21 %0 = udiv i8 %x, 10 37 %0 = udiv i16 %x, 10 53 %0 = udiv i16 %x, 10 69 %0 = udiv i32 %x, 10 85 %0 = udiv i32 %x, 10 101 %0 = udiv i64 %x, 10 117 %0 = udiv i64 %x, 10 133 %0 = udiv i8 %x, 10 149 %0 = udiv i8 %x, 10 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-mul-div.ll | 218 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 219 %tmp3 = udiv <1 x i8> %A, %B; 225 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 226 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 227 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 228 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 229 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 230 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 231 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 232 ; CHECK: udiv {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} [all …]
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D | rem_crash.ll | 5 %0 = udiv i8 %x, 10 21 %0 = udiv i8 %x, 10 37 %0 = udiv i16 %x, 10 53 %0 = udiv i16 %x, 10 69 %0 = udiv i32 %x, 10 85 %0 = udiv i32 %x, 10 101 %0 = udiv i64 %x, 10 117 %0 = udiv i64 %x, 10 133 %0 = udiv i8 %x, 10 149 %0 = udiv i8 %x, 10 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CorrelatedValuePropagation/ |
D | udiv.ll | 5 ; CHECK udiv i32 %n, 100 6 %div = udiv i32 %n, 100 17 ; CHECK: udiv i16 18 %div = udiv i32 %n, 100 32 ; CHECK: udiv i32 %n, 100 33 %div = udiv i32 %n, 100 49 ; CHECK: udiv i16 50 %div = udiv i32 %m, %n 66 ; CHECK: udiv i32 %m, %n 67 %div = udiv i32 %m, %n [all …]
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/external/llvm/test/Transforms/InstCombine/ |
D | compare-udiv.ll | 6 %div = udiv i32 %n, %d 14 %div = udiv i32 64, %d 22 %div = udiv i32 %n, %d 30 %div = udiv i32 64, %d 38 %div = udiv i32 -1, %d 46 %div = udiv i32 5, %d 51 ; (icmp ugt (udiv C1, X), C1) -> false. 55 %div = udiv i32 8, %d 63 %div = udiv i32 4, %d 71 %div = udiv i32 4, %d [all …]
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D | 2012-08-28-udiv_ashl.ll | 9 ; CHECK: udiv i32 %x, 400 14 %div1 = udiv i32 %div, 100 26 %div1 = udiv i32 %div, 100 31 ; CHECK: udiv i32 %x, 400 37 ; unsigned inputs), turn this into a udiv. 45 ; CHECK: udiv i80 %x, 400 49 %div1 = udiv i80 %div, 100 55 %div1 = udiv i32 %div, 100
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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
D | div-vec.ll | 59 %res = udiv <4 x i32> %v1, %v2 61 ; ASM: udiv r0, r0, r1 62 ; ASM: udiv r0, r0, r1 63 ; ASM: udiv r0, r0, r1 64 ; ASM: udiv r0, r0, r1 71 ; IASM-NOT: udiv 82 %res = udiv <8 x i16> %v1, %v2 86 ; ASM: udiv r0, r0, r1 89 ; ASM: udiv r0, r0, r1 92 ; ASM: udiv r0, r0, r1 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | lds-oqap-crash.ll | 17 ; so we'll use udiv instructions. 18 %div0 = udiv i32 %0, %b 19 %div1 = udiv i32 %div0, %a 20 %div2 = udiv i32 %div1, 11 21 %div3 = udiv i32 %div2, %a 22 %div4 = udiv i32 %div3, %b 23 %div5 = udiv i32 %div4, %c 24 %div6 = udiv i32 %div5, %div0 25 %div7 = udiv i32 %div6, %div1
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/external/llvm/test/CodeGen/AMDGPU/ |
D | lds-oqap-crash.ll | 17 ; so we'll use udiv instructions. 18 %div0 = udiv i32 %0, %b 19 %div1 = udiv i32 %div0, %a 20 %div2 = udiv i32 %div1, 11 21 %div3 = udiv i32 %div2, %a 22 %div4 = udiv i32 %div3, %b 23 %div5 = udiv i32 %div4, %c 24 %div6 = udiv i32 %div5, %div0 25 %div7 = udiv i32 %div6, %div1
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D | structurize.ll | 68 ; so we'll use udiv instructions. 69 %div0 = udiv i32 %a, %b 70 %div1 = udiv i32 %div0, %4 71 %div2 = udiv i32 %div1, 11 72 %div3 = udiv i32 %div2, %a 73 %div4 = udiv i32 %div3, %b 74 %div5 = udiv i32 %div4, %c 75 %div6 = udiv i32 %div5, %div0 76 %div7 = udiv i32 %div6, %div1
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/external/llvm/test/Analysis/CostModel/ARM/ |
D | divrem.ll | 117 ; CHECK: cost of 40 {{.*}} udiv 119 %1 = udiv <2 x i8> %a, %b 124 ; CHECK: cost of 40 {{.*}} udiv 126 %1 = udiv <2 x i16> %a, %b 131 ; CHECK: cost of 40 {{.*}} udiv 133 %1 = udiv <2 x i32> %a, %b 138 ; CHECK: cost of 40 {{.*}} udiv 140 %1 = udiv <2 x i64> %a, %b 145 ; CHECK: cost of 10 {{.*}} udiv 147 %1 = udiv <4 x i8> %a, %b [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/ARM/ |
D | divrem.ll | 117 ; CHECK: cost of 40 {{.*}} udiv 119 %1 = udiv <2 x i8> %a, %b 124 ; CHECK: cost of 40 {{.*}} udiv 126 %1 = udiv <2 x i16> %a, %b 131 ; CHECK: cost of 40 {{.*}} udiv 133 %1 = udiv <2 x i32> %a, %b 138 ; CHECK: cost of 40 {{.*}} udiv 140 %1 = udiv <2 x i64> %a, %b 145 ; CHECK: cost of 10 {{.*}} udiv 147 %1 = udiv <4 x i8> %a, %b [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LICM/ |
D | preheader-safe.ll | 11 ; CHECK: %div = udiv i64 %x, %y 18 %div = udiv i64 %x, %y 26 ; The udiv is guarantee to execute if the loop is 29 ; CHECK: %div = udiv i64 %x, %y 36 %div = udiv i64 %x, %y 44 ; CHECK: %div = udiv i64 %x, %y 53 %div = udiv i64 %x, %y 65 ; CHECK: %div = udiv i64 %x, %y 75 %div = udiv i64 %x, %y 84 ; CHECK: %div = udiv i64 %x, %y [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | rem_crash.ll | 5 %0 = udiv i8 %x, 10 21 %0 = udiv i8 %x, 10 37 %0 = udiv i16 %x, 10 53 %0 = udiv i16 %x, 10 69 %0 = udiv i32 %x, 10 85 %0 = udiv i32 %x, 10 101 %0 = udiv i64 %x, 10 117 %0 = udiv i64 %x, 10 133 %0 = udiv i8 %x, 10 149 %0 = udiv i8 %x, 10 [all …]
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/external/llvm/test/CodeGen/X86/ |
D | rem_crash.ll | 6 %0 = udiv i8 %x, 10 22 %0 = udiv i8 %x, 10 38 %0 = udiv i16 %x, 10 54 %0 = udiv i16 %x, 10 70 %0 = udiv i32 %x, 10 86 %0 = udiv i32 %x, 10 102 %0 = udiv i64 %x, 10 118 %0 = udiv i64 %x, 10 134 %0 = udiv i8 %x, 10 150 %0 = udiv i8 %x, 10 [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | rem_crash.ll | 5 %0 = udiv i8 %x, 10 21 %0 = udiv i8 %x, 10 37 %0 = udiv i16 %x, 10 53 %0 = udiv i16 %x, 10 69 %0 = udiv i32 %x, 10 85 %0 = udiv i32 %x, 10 101 %0 = udiv i64 %x, 10 117 %0 = udiv i64 %x, 10 133 %0 = udiv i8 %x, 10 149 %0 = udiv i8 %x, 10 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | rem_crash.ll | 6 %0 = udiv i8 %x, 10 22 %0 = udiv i8 %x, 10 38 %0 = udiv i16 %x, 10 54 %0 = udiv i16 %x, 10 70 %0 = udiv i32 %x, 10 86 %0 = udiv i32 %x, 10 102 %0 = udiv i64 %x, 10 118 %0 = udiv i64 %x, 10 134 %0 = udiv i8 %x, 10 150 %0 = udiv i8 %x, 10 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/ |
D | div.ll | 16 %B = udiv <2 x i32> zeroinitializer, %A 42 %div = udiv <2 x i8> <i8 1, i8 2>, <i8 42, i8 0> 58 %div = udiv <2 x i8> %x, <i8 0, i8 42> 74 %div = udiv <2 x i8> %x, <i8 undef, i8 42> 94 %div = udiv <2 x i1> %x, %y 103 %r = udiv i32 %y, %ext 121 %div = udiv i32 %and, 251 128 ; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AND]], 251 132 %div = udiv i32 %and, 251 141 %div = udiv i32 250, %or [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/ |
D | div.ll | 76 define i32 @udiv() { 77 ; CHECK-LABEL: 'udiv' 78 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, und… 79 ; CHECK-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V2i64 = udiv <2 x i64> u… 80 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i64 = udiv <4 x i64> u… 81 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i64 = udiv <8 x i64> … 82 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, und… 83 ; CHECK-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V4i32 = udiv <4 x i32> u… 84 ; CHECK-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V8i32 = udiv <8 x i32> … 85 ; CHECK-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V16i32 = udiv <16 x i32… [all …]
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/external/llvm/test/MC/ARM/ |
D | idiv.s | 14 udiv r3, r4, r5 16 @ A15-ARM: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7] 18 @ A15-THUMB: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3] 21 @ A15-ARM-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7] 23 @ A15-THUMB-NOARMHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3] 26 @ ARMV8: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7] 28 @ THUMBV8: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3] 31 @ ARMV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7] 33 @ THUMBV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
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