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Searched refs:urshl (Results 1 – 25 of 42) sorted by relevance

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/external/capstone/suite/MC/AArch64/
Dneon-rounding-shift.s.cs9 0x20,0x54,0x22,0x2e = urshl v0.8b, v1.8b, v2.8b
10 0x20,0x54,0x22,0x6e = urshl v0.16b, v1.16b, v2.16b
11 0x20,0x54,0x62,0x2e = urshl v0.4h, v1.4h, v2.4h
12 0x20,0x54,0x62,0x6e = urshl v0.8h, v1.8h, v2.8h
13 0x20,0x54,0xa2,0x2e = urshl v0.2s, v1.2s, v2.2s
14 0x20,0x54,0xa2,0x6e = urshl v0.4s, v1.4s, v2.4s
15 0x20,0x54,0xe2,0x6e = urshl v0.2d, v1.2d, v2.2d
Dneon-scalar-rounding-shift.s.cs3 0xf1,0x57,0xe8,0x7e = urshl d17, d31, d8
/external/llvm/test/MC/AArch64/
Dneon-rounding-shift.s28 urshl v0.8b, v1.8b, v2.8b
29 urshl v0.16b, v1.16b, v2.16b
30 urshl v0.4h, v1.4h, v2.4h
31 urshl v0.8h, v1.8h, v2.8h
32 urshl v0.2s, v1.2s, v2.2s
33 urshl v0.4s, v1.4s, v2.4s
34 urshl v0.2d, v1.2d, v2.2d
Dneon-scalar-rounding-shift.s14 urshl d17, d31, d8
Dneon-diagnostics.s944 urshl v1.2d, v25.2d, v6.4s
1009 urshl s0, s1, s2
Darm64-advsimd.s369 urshl.8b v0, v0, v0
440 ; CHECK: urshl.8b v0, v0, v0 ; encoding: [0x00,0x54,0x20,0x2e]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-rounding-shift.s28 urshl v0.8b, v1.8b, v2.8b
29 urshl v0.16b, v1.16b, v2.16b
30 urshl v0.4h, v1.4h, v2.4h
31 urshl v0.8h, v1.8h, v2.8h
32 urshl v0.2s, v1.2s, v2.2s
33 urshl v0.4s, v1.4s, v2.4s
34 urshl v0.2d, v1.2d, v2.2d
Dneon-scalar-rounding-shift.s14 urshl d17, d31, d8
Dneon-diagnostics.s949 urshl v1.2d, v25.2d, v6.4s
1014 urshl s0, s1, s2
Darm64-advsimd.s369 urshl.8b v0, v0, v0
440 ; CHECK: urshl.8b v0, v0, v0 ; encoding: [0x00,0x54,0x20,0x2e]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll178 ;CHECK: urshl.8b
181 %tmp3 = call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
187 ;CHECK: urshl.4h
190 %tmp3 = call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
196 ;CHECK: urshl.2s
199 %tmp3 = call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
241 ;CHECK: urshl.16b
244 %tmp3 = call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
250 ;CHECK: urshl.8h
253 %tmp3 = call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll178 ;CHECK: urshl.8b
181 %tmp3 = call <8 x i8> @llvm.aarch64.neon.urshl.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
187 ;CHECK: urshl.4h
190 %tmp3 = call <4 x i16> @llvm.aarch64.neon.urshl.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
196 ;CHECK: urshl.2s
199 %tmp3 = call <2 x i32> @llvm.aarch64.neon.urshl.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
241 ;CHECK: urshl.16b
244 %tmp3 = call <16 x i8> @llvm.aarch64.neon.urshl.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
250 ;CHECK: urshl.8h
253 %tmp3 = call <8 x i16> @llvm.aarch64.neon.urshl.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
[all …]
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2048 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30
2049 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b
2050 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d
2051 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s
2052 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h
2053 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s
2054 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b
2055 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h
Dlog-disasm2048 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30
2049 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b
2050 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d
2051 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s
2052 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h
2053 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s
2054 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b
2055 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h
Dlog-cpufeatures-custom2047 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30 ### {NEON} ###
2048 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b ### {NEON} ###
2049 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d ### {NEON} ###
2050 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s ### {NEON} ###
2051 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h ### {NEON} ###
2052 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s ### {NEON} ###
2053 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b ### {NEON} ###
2054 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h ### {NEON} ###
Dlog-cpufeatures2047 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30 // Needs: NEON
2048 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b // Needs: NEON
2049 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d // Needs: NEON
2050 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s // Needs: NEON
2051 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h // Needs: NEON
2052 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s // Needs: NEON
2053 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b // Needs: NEON
2054 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h // Needs: NEON
Dlog-cpufeatures-colour2047 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30 NEON
2048 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b NEON
2049 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d NEON
2050 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s NEON
2051 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h NEON
2052 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s NEON
2053 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b NEON
2054 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h NEON
Dlog-all5399 0x~~~~~~~~~~~~~~~~ 7efe5784 urshl d4, d28, d30
5401 0x~~~~~~~~~~~~~~~~ 6e3357ed urshl v13.16b, v31.16b, v19.16b
5403 0x~~~~~~~~~~~~~~~~ 6ef556ee urshl v14.2d, v23.2d, v21.2d
5405 0x~~~~~~~~~~~~~~~~ 2ea854ea urshl v10.2s, v7.2s, v8.2s
5407 0x~~~~~~~~~~~~~~~~ 2e7c56af urshl v15.4h, v21.4h, v28.4h
5409 0x~~~~~~~~~~~~~~~~ 6eb7551e urshl v30.4s, v8.4s, v23.4s
5411 0x~~~~~~~~~~~~~~~~ 2e25569f urshl v31.8b, v20.8b, v5.8b
5413 0x~~~~~~~~~~~~~~~~ 6e7e577e urshl v30.8h, v27.8h, v30.8h
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2390 __ urshl(d4, d28, d30); in GenerateTestSequenceNEON() local
2391 __ urshl(v13.V16B(), v31.V16B(), v19.V16B()); in GenerateTestSequenceNEON() local
2392 __ urshl(v14.V2D(), v23.V2D(), v21.V2D()); in GenerateTestSequenceNEON() local
2393 __ urshl(v10.V2S(), v7.V2S(), v8.V2S()); in GenerateTestSequenceNEON() local
2394 __ urshl(v15.V4H(), v21.V4H(), v28.V4H()); in GenerateTestSequenceNEON() local
2395 __ urshl(v30.V4S(), v8.V4S(), v23.V4S()); in GenerateTestSequenceNEON() local
2396 __ urshl(v31.V8B(), v20.V8B(), v5.V8B()); in GenerateTestSequenceNEON() local
2397 __ urshl(v30.V8H(), v27.V8H(), v30.V8H()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc2639 TEST_NEON(urshl_0, urshl(v0.V8B(), v1.V8B(), v2.V8B()))
2640 TEST_NEON(urshl_1, urshl(v0.V16B(), v1.V16B(), v2.V16B()))
2641 TEST_NEON(urshl_2, urshl(v0.V4H(), v1.V4H(), v2.V4H()))
2642 TEST_NEON(urshl_3, urshl(v0.V8H(), v1.V8H(), v2.V8H()))
2643 TEST_NEON(urshl_4, urshl(v0.V2S(), v1.V2S(), v2.V2S()))
2644 TEST_NEON(urshl_5, urshl(v0.V4S(), v1.V4S(), v2.V4S()))
2645 TEST_NEON(urshl_6, urshl(v0.V2D(), v1.V2D(), v2.V2D()))
2646 TEST_NEON(urshl_7, urshl(d0, d1, d2))
Dtest-simulator-aarch64.cc4564 DEFINE_TEST_NEON_3SAME(urshl, Basic)
4621 DEFINE_TEST_NEON_3SAME_SCALAR_D(urshl, Basic)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt419 # CHECK: urshl v10.16b, v5.16b, v2.16b
421 # CHECK: urshl v1.8h, v5.8h, v2.8h
423 # CHECK: urshl v1.4s, v5.4s, v2.4s
424 # CHECK: urshl v0.2d, v1.2d, v2.2d
475 # CHECK: urshl d8, d7, d4
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt419 # CHECK: urshl v10.16b, v5.16b, v2.16b
421 # CHECK: urshl v1.8h, v5.8h, v2.8h
423 # CHECK: urshl v1.4s, v5.4s, v2.4s
424 # CHECK: urshl v0.2d, v1.2d, v2.2d
475 # CHECK: urshl d8, d7, d4
/external/v8/src/arm64/
Dmacro-assembler-arm64.h500 V(urshl, Urshl) \
Dassembler-arm64.h1955 void urshl(const VRegister& vd, const VRegister& vn, const VRegister& vm);

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